AK4103AVF AKM [Asahi Kasei Microsystems], AK4103AVF Datasheet
AK4103AVF
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AK4103AVF Summary of contents
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ASAHI KASEI The AK4103A is a digital audio transmitter (DIT) which supports data rate up to 192kHz sample rate operation. The AK4103A supports AES3, IEC60958, S/PDIF & EIAJ CP1201 interface standards. The AK4103A accepts audio data, auxiliary information data and ...
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ASAHI KASEI n Block Diagram BICK LRCK SDTI FS0 FS1 FS2 FS3 MS0251-E-00 Prescaler Audio Serial Interface Biphase Encoder CRCC Generator Host Serial Interface - 2 - [AK4103A] TXP TXN 2003/07 ...
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... ASAHI KASEI n Ordering Guide AK4103AVF -40 + Pin Layout V1 1 TRANS 2 PDN 3 MCLK 4 SDTI 5 BICK 6 LRCK 7 FS0/CSN 8 FS1/CDTI 9 FS2/CCLK 10 FS3/CDTO Comparison AK4103 with AK4103A Function Ambient Temperature CRCC generation by FS3-0 pins CRCC generation by FS3-0 bits MS0251-E-00 24pin VSOP (0.65mm pitch) ...
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ASAHI KASEI No. Pin Name I TRANS I 3 PDN I 4 MCLK I 5 SDTI I 6 BICK I/O 7 LRCK I/O 8 FS0 I CSN I AKMODE I 9 FS1 I CDTI I 10 ...
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ASAHI KASEI (VSS=0V; Note 3) Parameter Power Supply Input Current (All pins except supply pins) Input Voltage Ambient Operating Temperature Storage Temperature Notes: 3. All voltages with respect to ground. WARNING: Operation at or beyond these limits may results in ...
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ASAHI KASEI (Ta=25 C; VDD=4.75~5.25V; C =20pF) L Parameter Master Clock Timing Frequency Duty Cycle LRCK Timing Frequency Duty Cycle at Slave Mode Duty Cycle at Master Mode Audio Interface Timing Slave Mode BICK Period BICK Pulse Width Low Pulse ...
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ASAHI KASEI n Timing Diagram MCLK LRCK BICK LRCK BICK SDTI LRCK tMBLR BICK SDTI MS0251-E-00 1/fCLK tCLKH tCLKL dCLK = tCLKH x fCLK x 100 1/fs tBCK tBCKH tBCKL Clock Timing tBLR tLRB tSDS tSDH Audio Interface Timing (Slave ...
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ASAHI KASEI CSN CCLK CDTI CDTO CSN CCLK CDTI D3 CDTO CSN CCLK CDTI A1 Hi-Z CDTO (with pull-down resistor) MS0251-E-00 tCSS tCCKL tCCKH tCDH tCDS Hi-Z (with pull-down resistor) WRITE/READ Command Input Timing tCSH D2 D1 ...
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ASAHI KASEI CSN CCLK CDTI CDTO D3 PDN MS0251-E-00 tCSW tCSH READ Data Output Timing 2 tPDW Power-down & Reset Timing - 9 - [AK4103A] VIH VIL VIH VIL VIH VIL tCCZ 50%VDD VIL 2003/07 ...
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ASAHI KASEI n General Description The AK4103A is a monolithic CMOS circuit that biphase-encodes and transmits audio data, auxiliary information data and etc according to the AES3, IEC60958, S/PDIF and EIAJ CP1201 interface standards. There is one set of stereo ...
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Synchronous Mode (hardware controlled) The AK4103A when configured in synchronous mode accepts bit audio samples through the audio serial port and provides dedicated pins for the control data and allows all channel status, user data and ...
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BLS C (or U,V) C(R191) LRCK SDTI R190 2 (except I S) SDTI L191 Figure 2. Audio routing mode timing (AKMODE pin = “1”) n Block Start Timing Normal mode In normal mode (TRANS pin = “0”), ...
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ASAHI KASEI Serial Ports Normal mode In normal mode (TRANS pin = “0”), the C, U and V bits are captured (either from the pins, in synchronous mode, or the control registers, in the asynchronous mode) ...
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Channel 1 LRCK BICK C,U,V Figure 7. Audio routing, DIF modes 5 and Audio Serial Interface The audio serial interface is used to input audio data and consists of three pins: Bit Clock (BICK), Word Clock (LRCK) ...
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ASAHI KASEI LRCK( BICK(i) SDTI(i) 17:MSB, 0:LSB LRCK( BICK(i) SDTI(i) 19:MSB, 0:LSB LRCK( BICK( SDTI(i) 23:MSB, 0:LSB MS0251-E- ...
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ASAHI KASEI LRCK BICK SDTI(i) 23:MSB, 0:LSB Lch Data LRCK BICK SDTI(i) 23:MSB, 0:LSB MS0251-E- ...
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ASAHI KASEI n Sampling frequency setting Bits 3-0 of Channel Status Byte 3 in consumer mode can be set by FS3-0 pins. Also bits 7-6 of Channel Status Byte 0 and bits 6-3 of Channel Status Byte 4 in professional ...
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ASAHI KASEI n Data Transmission Format Data transmitted on the TX outputs is formatted in blocks as shown in Figure 14. Each block consists of 192 frames. A frame of data contains two sub-frames. A sub-frame consists of 32 bits ...
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ASAHI KASEI n Line Driver There is an RS422 line driver on chip. The AES3 specification states that the line driver shall have a balanced output with an internal impedance of 110 ohms 20% and also requires a balanced output ...
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ASAHI KASEI n Serial Control Interface In asynchronous mode, four of the dual function pins become CSN, CCLK, CDTI and CDTO wire microprocessor interface. The internal 18 byte control register can then be read and written. The contents ...
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Register Map Addr Register Name 00H Clock/Format Control 01H Validity/fs Control A-channel C-bit buffer 02H for Byte 0 A-channel C-bit buffer 03H for Byte 1 A-channel C-bit buffer 04H for Byte 2 A-channel C-bit buffer 05H for Byte 3 ...
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Register Definitions Addr Register Name 00H Clock/Format Control R/W Default RSTN: Timing Reset. 0: Resets the internal frame and bit counters. Control registers are not initialized. TXP pin is “H” and TXN pin is “L”. In normal mode, BLS ...
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ASAHI KASEI Addr Register Name A-channel C-bit buffer 02H for Byte 0 B-channel C-bit buffer 06H for Byte 0 R/W Default C0-7: Channel Status Byte 0 Default: “00100000” Addr Register Name A-channel C-bit buffer 03H CA15 for Byte 1 B-channel ...
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Addr Register Name 0AH- A-channel U-bit buffer 0DH for Byte 0-3 0EH- B-channel U-bit buffer 11H for Byte 0-3 R/W Default U0-31: User Data Default: all “0” n Default values of control registers Bits CRCE DIF2-0 CKS1-0 V1 FS3-0 MUTEN ...
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ASAHI KASEI 24pin VSOP (Unit: mm) *7.8 0. 0.22 0.1 Seating Plane NOTE: Dimension "*" does not include mold flash. n Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0251-E-00 PACKAGE ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0251-E-00 MARKING AKM AK4103AVF AAXXXX Contents of AAXXXX AA: Lot# XXXX: Date Code ...