AK4110 AKM [Asahi Kasei Microsystems], AK4110 Datasheet - Page 19

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AK4110

Manufacturer Part Number
AK4110
Description
High Feature 96kHz 24bit DIR
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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ASAHI KASEI
n Audio Serial Interface Format
The DIF0, DIF1 and DIF2 pins as shown in Table 13 can select eight serial data formats. In all formats the serial data is
MSB-first, 2's compliment format. The SDTO is clocked out on the falling edge of BICK and the DAUX is latched on
the rising edge of BICK. BICK outputs 64fs clock in Mode 0-5. Mode 6-7 are Slave Modes, and BICK is available up to
128fs at fs=48kHz. In the format equal or less than 20bit (Mode0-2), LSBs in sub-frame are truncated. In Mode 3-7, the
last 4LSBs are auxiliary data (see Figure 5).
When the Parity Error, Biphase Error or Frame Length Error occurs in a sub-frame, AK4112A continues to output the
last normal sub-frame data from SDTO repeatedly until the error is removed. When the Unlock Error occurs, AK4112A
output “0” from SDTO. In case of using DAUX pin, the data is transformed and output from SDTO. DAUX pin is used
in Clock Operation Mode 1, 3 and unlock state of Mode 2.
The input data format to DAUX should be left justified except in Mode5 and 7(Table 13). In Mode5 or 7, both the input
data format of DAUX and output data format of SDTO are I
Master Mode of Mode4 and 5. In salve Mode, LRCK and BICK should be fed with synchronizing to MCKO1/2.
The initial state of the audio format is the Master Mode upon the power-up. Therefore, if the audio format is changed to
the Slave Mode after power-up, the setting of the external clocks should be careful until completing to set the control
registers.
MS0020-E-00
Mode DIF2 DIF1 DIF0
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
preamble
0
1
0
1
0
1
0
1
3 4
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, I
24bit, Left justified
24bit, I
MSB
23
LSB
Aux.
DAUX
2
2
S
S
7 8
AK4112 Audio Data (MSB First)
Table 13. Audio data format
Figure 5. Bit configuration
11 12
sub-frame of IEC958
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I
24bit, Left justified
24bit, I
- 19 -
2
S. Mode6 and 7 are Slave Mode that is corresponding to the
2
2
SDTO
S
S
H/L
H/L
H/L
H/L
H/L
L/H
H/L
L/H
LRCK
MSB
LSB
27 28 29 30 31
0
V U C P
I/O
O
O
O
O
O
O
I
I
64-128fs
64-128fs
64fs
64fs
64fs
64fs
64fs
64fs
BICK
[AK4112A]
I/O
O
O
O
O
O
O
I
I
2000/3
Default

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