AK4160 AKM [Asahi Kasei Microsystems], AK4160 Datasheet - Page 30

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AK4160

Manufacturer Part Number
AK4160
Description
16-channel Capacitive Touch Sensor IC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
IRQ Control Register (IRQCn: n=0~2)
These are the control registers of the IRQ pins. When the IRQ pins are used as GPIO, the bit allocation is different.
IRQ Interrupt Register (When GPEN bit = “0”)
MS1313-E-01
Address 0x64/0x68/0x6C (W/R) Default 0x08
Address 0x65/0x69/0x6D (W/R) Default 0x00
D4-D3
Bits
D7
D6
D5
D2
D1
D0
IRQ Interrupt
IRQ Interrupt
Description
Description
CLRM
GPEN
DSTR
HIGH
Name
DRV
PE
PU
DRDY
GPEN
GPIO Enable
This bit should be set to “0” in the IRQ operation.
Clearance Setting of IRQ Status (Addr 0x03 IRQ2-0 bits)
Polarity selection of IRQ pins
Output Driver Setting
The Driving ability of the GPIO output driver is set.
Pull-up, Pull-down Enable
Pull-up / Pull-down Selector
D7
D7
0: Read Clear of IRQ Status
1: Write Clear of IRQ Status (Clear to write “1” to IRQ2-0 bits)
IRQ status is cleared in the edge operation. The status is not changed in the level
operation.
0: Active Low
1: Active High]
IRQ pins are always non-active in the shutdown mode.
00: CMOS Output
01: Low Side Output: When Output is “H”, Hi-z (Open Drain)
10: High Side Output: When Output is “L”, Hi-z (Open Drain)
11: CMOS Output (Same as 00 Setting)
0: 1/3 drive
1: full drive
0: Invalid
1: Valid. The direction is fixed by PU bit.
0: Pull-down
1: Pull-up
TOUCH
CLRM
D6
D6
HIGH
- 30 -
REL
D5
D5
DRV[1]
ACF
D4
D4
Description
RANGE
DRV[0]
D3
D3
DSTR
GPIN
D2
D2
Reserved
D1
D1
PE
[AK4160]
TSL
2011/11
D0
D0
PU

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