SPT9712BIP CADEKA [Cadeka Microcircuits LLC.], SPT9712BIP Datasheet

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SPT9712BIP

Manufacturer Part Number
SPT9712BIP
Description
12-BIT, 100 MWPS ECL D/A CONVERTER
Manufacturer
CADEKA [Cadeka Microcircuits LLC.]
Datasheet
FEATURES
• 12-Bit, 100 MWPS digital-to-analog converter
• ECL compatibility
• Low power: 600 mW
• 1/2 LSB DNL
• 40 MHz multiplying bandwidth
• Industrial temperature range
• Superior performance over AD9712
GENERAL DESCRIPTION
The SPT9712 is a 12-bit, 100 MWPS digital-to-analog
converter designed for direct digital synthesis, high reso-
lution imaging, and arbitrary waveform generation applica-
tions.
This device is pin-for-pin compatible with the AD9712 with
significantly improved performance. The only difference
between the SPT9712 and the AD9712 is that the Latch
Enable (LE, pin 26) for the SPT9712 is rising-edge trig-
BLOCK DIAGRAM
– Improved settling time of 13 ns
– Improved glitch energy 15 pV-s
– Master-slave latches
12-BIT, 100 MWPS ECL D/A CONVERTER
APPLICATIONS
• Fast frequency hopping spread spectrum radios
• Direct sequence spread spectrum radios
• Microwave and satellite modems
• Test & measurement instrumentation
gered (see figure 1), whereas the Latch Enable (LE, pin
26) for the AD9712 functions in the transparent mode.
The SPT9712 is an ECL-compatible device. It features a
fast settling time of 13 ns and low glitch impulse energy of
15 pV-s, which results in excellent spurious-free dynamic
range characteristics.
The SPT9712 is available in a 28-lead PLCC package in
the industrial temperature range (–40 to +85 °C).
SPT9712
TECHNICAL DATA
FEBRUARY 15, 2001

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SPT9712BIP Summary of contents

Page 1

FEATURES • 12-Bit, 100 MWPS digital-to-analog converter • ECL compatibility • Low power: 600 mW • 1/2 LSB DNL • 40 MHz multiplying bandwidth • Industrial temperature range • Superior performance over AD9712 – Improved settling time ...

Page 2

ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur) Supply Voltages Negative Supply Voltage (V ) .............................. – A/D Ground Voltage Differential ........................... 0.5 V Input Voltages Digital Input Voltage (D1–D12, Latch Enable) ............................... Control ...

Page 3

ELECTRICAL SPECIFICATIONS – –5 7 Control Amp In = Ref Out MIN MAX EE SET PARAMETERS Voltage Input and Control Reference Input Impedance Ref. Multiplying Bandwidth ...

Page 4

THEORY OF OPERATION The SPT9712 uses a segmented architecture incorporat- ing most significant bit (MSB) decoding. The four MSBs (D1–D4) are decoded to thermometer code lines to drive 15 discrete current sinks. For the eight least significant bits (LSBs), D5 ...

Page 5

Figure 1 – Timing Diagram Figure 2 – Typical Interface Circuit W 5 SPT9712 2/15/01 ...

Page 6

PACKAGE OUTLINE 28-Lead PLCC INCHES SYMBOL MIN A 0.452 B 0.485 C D 0.170 E 0.020 F 0.031 G 0.013 H 0.048 I 0.410 6 MILLIMETERS MAX MIN MAX 0.456 11.48 11.58 0.495 12.32 12.57 30° 30° 0.179 4.32 4.55 ...

Page 7

... PIN ASSIGNMENTS ORDERING INFORMATION PART NUMBER SPT9712AIP ±0.75/±1.0 SPT9712BIP ±1.25/±1.5 PIN FUNCTIONS Name Out+ Out– D1–D12 Latch Enable Ref In Ref Out Ref GND Control Amp In Control Amp Out Output of Internal Control Amplifier R Set 1 Analog Return Analog V Digital V DGND ...

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