MT89L80AN1 ZARLINK [Zarlink Semiconductor Inc], MT89L80AN1 Datasheet
MT89L80AN1
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MT89L80AN1 Summary of contents
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... Ordering Information MT89L80ANR MT89L80APR MT89L80AP MT89L80AN MT89L80APR1 MT89L80ANR1 MT89L80AN1 MT89L80AP1 Description This VLSI CMOS device is designed for switching PCM-encoded voice or data, under microprocessor control modern digital exchange, PBX or Central Office. It provides simultaneous connections for up to 256 64 kbit/s channels. Each of the eight serial inputs ...
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STi3 7 STi4 8 9 STi5 STi6 10 STi7 F0i 13 C4i PIN PLCC Pin Description Pin # Name 44 48 PLCC SSOP 2 2 DTA Data Acknowledgment ...
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Pin Description (continued) Pin # Name 44 48 PLCC SSOP 14 15 C4i 4.096 MHz Clock (5 V-tolerant Input). ST-BUS bit cell boundaries lie on the alternate falling edges of this clock. 15-17 16-18 A0-2 Address 0-2 / Input Streams ...
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The serial streams of the ST-BUS operate continuously at 2048 kbit/s and are arranged in 125 µs wide frames which contain 32 8-bit channels. Zarlink manufactures a number of devices which interface to the ST-BUS; a key device being the ...
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• • • • • • • • • • • • Writing to the Control Register is the ...
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Mode Control Bits 7 Bit Name 6 Message When 1, the contents of the Connection Memory Low are output on the Serial Output Mode streams except when the ODE pin is low. When 0, the Connection Memory bits for each ...
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Bit Name 7-5* Stream The number expressed in binary notation on these 3 bits is the number of the ST-BUS Address stream for the source of the connection. Bit 7 is the most significant bit. e.g., if bit 7 ...
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ST-BUS output. This signalling ST-BUS output is monitored by a microprocessor (not shown) through an ST-BUS input on the bottom MT89L80. Fig. 8 ...
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Absolute Maximum Ratings* Parameter 1 Supply Voltage 2 Voltage on any I/O pin (except supply pins) 3 Current at Digital Outputs 4 Storage Temperature 5 Package Power Dissipation * Exceeding these values may cause permanent damage. Functional operation under these ...
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AC Electrical Characteristics - Clock Timing (Figures 9 and 10) Characteristics 1 Clock Period* 2 Clock Width High Clock Width Low P 4 Clock Transition Time Frame Pulse Setup Time S 6 Frame ...
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C4i FPH V HM F0i V LM † AC Electrical Characteristics - Serial Streams (Figures 11, 12 and 13) Characteristics 1 STo0/7 Delay - Active to High STo0/7 Delay ...
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MT89L80 Bit Cell Boundary V HM C4i STo0 STo7 V STo0 STo7 STo0 STo7 V HM CSTo V LM Figure 11 - Serial ...
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C4i STi0 to STi7 † AC Electrical Characteristics - Processor Bus (Figures 14) Characteristics 1 Chip Select Setup Time 2 Read/Write Setup Time 3 Address Setup Time 4 Acknowledgment Delay Control Register Read Control Register Write Connection Memory Read Connection ...
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CSS RWS ADS DTA ...
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Zarlink Semiconductor 2003 All rights reserved. ISSUE ACN DATE APPRD. Package Code Previous package codes ...
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For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in ...