AT86RF401E ATMEL [ATMEL Corporation], AT86RF401E Datasheet - Page 12

no-image

AT86RF401E

Manufacturer Part Number
AT86RF401E
Description
Smart RF Wireless Data Microtransmitter
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Watchdog Timer
Reset and Interrupt
Handling
Reset Sources
12
Address
$000
$002
$004
$006 MAIN:
AT86RF401
Labels
Code
jmp
jmp
jmp
<instr>
When enabling the watchdog timer, the status of the watchdog time is unknown. The
user is advised to execute a WDR instruction before enabling the watchdog. Otherwise,
the device might get reset before the first WDR after enabling is reached. To prevent the
unintentional disabling of the watchdog, a special turn-off procedure must be followed
when the watchdog is disabled. Refer to the description of the Watchdog Timer Control
Register on page 38 for details (see Register $22 in I/O Memory). The watchdog timer
prescaler determines the number of system clocks that occur before the watchdog reset
is asserted. The system clock is determined by Bits[7:5] of the AVR_CONFIG register.
The AT86RF401 Reset and Interrupt vectors are defined in Table 5. The I-bit in the sta-
tus register must be set to enable the interrupts.
Table 5. Reset and Interrupt Vectors
The most typical and general program setup for the Reset and Interrupt Vector
Addresses are:
The AT86RF401 has several sources of reset:
RESET
BT_F2_ISR
BT_F0_ISR
xxx
Number
Vector
Power-on Reset: The device is reset when the supply voltage is applied between the
VDD and GND pins. There are 10
occurring and the part becoming active. This is to ensure that the power is stable.
External Reset: The device is reset when a logic low level is present on the RESETB
pin. This resets all I/O Registers and puts the part into SPI mode. The I/O Registers
may be read and written by the SPI interface after two AVR System Clocks.
Watchdog Reset: This is similar to power-on reset but is caused by the watchdog
timer and does not have a 10
Brown-out Reset: This is caused by the battery voltage dropping below the Brown-
out Threshold voltage trip point.
Button Reset (software reset): The part is placed into a special reset state by
software. The part is released from reset when a properly configured button is
activated, and the part is not in external reset or brown-out reset. In the button reset
state, most I/O registers are not reset, and there is no time delay before becoming
active.
1
2
4
Program
Address
$000
$002
$004
Comments
; Reset handler
; Bit timer flag 2 interrupt service routine
; Bit timer flag 0 interrupt service routine
; Main program start
Source
Transmission Done (TXDONE)
Transmit Buffer Empty
RESETB, Watchdog, Buttons
6
cycle delay prior to becoming active.
6
cycles of delay between Power-on Reset
Interrupt Definition
Hardware Pin or Watchdog or
Button Reset
Bit Timer Flag 2 Interrupt
Bit Timer Flag 0 Interrupt
1424F–RKE–12/03

Related parts for AT86RF401E