GS820322T-138 ETC1 [List of Unclassifed Manufacturers], GS820322T-138 Datasheet - Page 3

• Manufacturer Part Number: GS820322T-138
• Description: 64K x 32 2M Synchronous Burst SRAM
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

TQFP Pin Description
Rev: 1.04 2/2001
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
5,10,17, 21, 26, 40, 55, 60, 67, 71, 76, 90
35, 34, 33, 32, 100, 99, 82, 81, 44, 45,
16, 38, 39, 42, 43, 66, 50, 51, 80, 1, 30
52, 53, 56, 57, 58, 59, 62, 63
68, 69, 72, 73, 74, 75, 78, 79
18, 19, 22, 23, 24, 25, 28, 29
4, 11, 20, 27, 54, 61, 70, 77
2, 3, 6, 7, 8, 9, 12, 13
Pin Location
46, 47, 48, 49
15, 41, 65, 91
37, 36
93, 94
95, 96
98, 92
84, 85
87
89
88
97
86
83
64
14
31
ADSP, ADSC
DQ
DQ
DQ
DQ
Symbol
A
B
B
A
E
V
C1
D1
A1
B1
ADV
LBO
V
2
GW
V
BW
C
NC
A
CK
0
1
ZZ
FT
DDQ
–A
E
G
, A
–DQ
–DQ
–DQ
–DQ
, B
, B
, E
DD
SS
2
15
1
B
D
3
A8
B8
C8
D8
3/23
Type
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Address Strobe (Processor, Cache Controller); active low
Address field LSBs and Address Counter preset Inputs
Byte Write Enable for DQ
Byte Write Enable for DQ
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write—Writes all enabled bytes; active low
Flow Through or Pipeline mode; active low
GS82032T/Q-150/138/133/117/100/66
Linear Burst Order mode; active low
Sleep Mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
I/O and Core Ground
Core power supply
Description
Address Inputs
No Connect
C
A
, DQ
, DQ
© 2000, Giga Semiconductor, Inc.
B
D
Data I/Os; active low
Data I/Os; active low
Preliminary