GS864418 GSI [GSI Technology], GS864418 Datasheet - Page 26
GS864418
Manufacturer Part Number
GS864418
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS864418.pdf
(41 pages)
- Current page: 26 of 41
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Sleep Mode
During normal operation, ZZ must be pulled low, either by the user or by its internal pull down resistor. When ZZ is pulled high,
the SRAM will enter a Power Sleep mode after 2 cycles. At this time, internal state of the SRAM is preserved. When ZZ returns to
low, the SRAM operates normally after ZZ recovery time.
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
DQa–DQd
Ao–An
Ba–Bd
ADSP
ADSC
ADV
GW
BW
CK
E1
E2
E3
G
Begin
A
Read A
tS
tS
tS
tS
tS
tH
tH
tH
tH
tKQ
tOE
E2 and E3 only sampled with ADSP and ADSC
Cont
tKH
tKH
tS
tS
tH
tH
tH
Q(A)
tKL
tKL
Deselect Write B
Flow Through Mode Timing (DCD)
tKC
tKC
tOHZ
D(B)
E1 masks ADSP
B
tS
tS
tS
tS
ADSC initiated read
tH
tH
tH
tH
26/41
C
tLZ
Read C
Fixed High
Read C+1 Read C+2 Read C+3 Read C
GS864418(B/E)/GS864436(B/E)/GS864472(C)
tS
Q(C)
E1 masks ADSP
Q(C+1)
Q(C+2)
Q(C+3)
tH
Deselect
Product Preview
Deselected with E1
Q(C)
© 2003, GSI Technology
tHZ
tKQX
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