GS8644V72C-250I GSI [GSI Technology], GS8644V72C-250I Datasheet - Page 32

• Manufacturer Part Number: GS8644V72C-250I
• Description: 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
• Manufacturer: GSI [GSI Technology]

JTAG Port Recommended Operating Conditions and DC Characteristics
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Input Under/overshoot voltage must be –2 V > Vi < V
V
0 V ≤ V
Output Disable, V
The TDO output driver is served by the V
I
I
I
I
Parallel SRAM input
OHJ
OLJ
OHJC
OHJC
ILJ
= + 4 mA
= –4 mA
≤ V
= –100 uA
= +100 uA
IN
IN
TMS, TCK and TDI Input Leakage Current
TMS, TCK and TDI Input Leakage Current
≤ V
≤ V
1.8 V Test Port Input High Voltage
1.8 V Test Port Input Low Voltage
TMS
TDO
TCK
TDO Output Leakage Current
Test Port Output High Voltage
ILJn
DDn
TDI
Test Port Output Low Voltage
Test Port Output CMOS High
Test Port Output CMOS Low
OUT
= 0 to V
Parameter
DDn
tTKC
tTKC
DDQ
tTKQ
supply.
JTAG Port Timing Diagram
tTS
tTS
tTS
DDn
32/40
+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tTKC.
tTH
tTH
tTH
tTKH
tTKH
GS8644V18(B/E)/GS8644V36(B/E)/GS8644V72(C)
Symbol
V
V
V
I
V
V
I
V
I
INHJ
OHJC
INLJ
OLJC
OLJ
OHJ
OLJ
IHJ
ILJ
V
tTKL
tTKL
DDQ
0.6 * V
Min.
–300
–0.3
– 100 mV
1.7
–1
–1
—
—
DD
0.3 * V
V
100 mV
Max.
DD
100
0.4
—
—
1
1
+0.3
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DD
© 2003, GSI Technology
Unit Notes
uA
uA
uA
V
V
V
V
V
V
5, 6
5, 7
5, 8
5, 9
1
1
2
3
4