HFDOM40P-008S1 HANBIT [Hanbit Electronics Co.,Ltd], HFDOM40P-008S1 Datasheet - Page 8

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HFDOM40P-008S1

Manufacturer Part Number
HFDOM40P-008S1
Description
40Pin Flash Disk Module Min.8MB ~ Max.384MB, True IDE Interface Mode, 3.3V / 5.0V Operating
Manufacturer
HANBIT [Hanbit Electronics Co.,Ltd]
Datasheet
HANBit
ACCESS SPCIFICATIONS
URL : www.hbe.co.kr
REV 1.0 (August.2002)
Invalid Mode
Standby Mode
Task File Write
Task File Read
Data Register Write
Data Register Read
Control Register Write
All Status Read
Data Delay after IORD
Data Hold following IORD
IORD Width Time
Address Setup before IORD
Address Hold following IORD
CE Setup before IORD
CE Hold following IORD
IOIS16 Delay Falling from Address
IOIS16 Delay Rising from Address
3. INTERFACE BUS TIMING
Table 3.1 IDE Mode I/O Access Mode
Table 3.2 IDE Mode I/O Read Timing
IDE MODE I/O ACCESS SPECIFICATIONS
NOTE: The maximum load on -IOIS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time
In this True IDE Mode the Flash Disk Module protocol and configuration are disabled and only I/O operations to the
Task File and Data Register are allowed. In this mode no Memory or Attribute Registers are accessible to the host.
–WAIT high to -IORD high is 0nsec, but minimum -IORD width must still be met.
from
Mode
Parameter
-CE2 -CE1
H
H
H
H
H
L
L
L
H
H
H
td (IORD)
th (IORD)
tw (IORD)
tsuA (IORD)
thA (IORD)
tsuCE (IORD)
thCE (IORD)
tdfIOIS16 (ADR)
tdrIOIS16 (ADR)
L
L
L
L
L
Symbol
A2-A0
1-7h
1-7h
6h
6h
x
x
0
0
8 / 10
-IORD
H
H
H
L
L
L
x
x
tlGLQV
tlGHQX
tlGLIGH
tAVIGL
tlGHAX
tELIGL
tlGHEH
tAVISL
tAVISH
IEEE Symbol
-IOWR
H
H
H
L
L
L
x
x
Odd Byte out
Odd Byte in
Don’t Care
Don’t Care
D15 - D8
High Z
High Z
High Z
High Z
HFDOM40P-xxxSx
Min. ns
HANBit Electronics Co., Ltd
165
70
20
20
0
5
Even Byte out
Even Byte in
Status Out
Control In
Data Out
D7 – D0
Data In
High Z
High Z
Max. ns
100
35
35
.

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