PEEL22CV10AZSI-25 ANACHIP [Anachip Corp], PEEL22CV10AZSI-25 Datasheet

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PEEL22CV10AZSI-25

Manufacturer Part Number
PEEL22CV10AZSI-25
Description
CMOS Programmable Electrically Erasable Logic Device
Manufacturer
ANACHIP [Anachip Corp]
Datasheet
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent
accompany the sale of the product.
General Description
The PEEL™22CV10AZ is a Programmable Electrically Erasable
Logic (PEEL™) device that provides a low power alternative to
ordinary PLDs. The PEEL™22CV10AZ is available in 24-pin
DIP, SOIC, TSSOP and 28-pin PLCC packages (see Figure 19). A
“zero-power” (100µA max. I
PEEL™22CV10AZ ideal for power sensitive applications such as
handheld meters, portable communication equipment and lap- top
computers/ peripherals. EE-reprogrammability provides the
convenience of instant reprogramming for development and a
reusable production inventory minimizing the impact of pro-
gramming changes or errors. EE-reprogrammability also
improves factory testability, thus ensuring the highest quality
possible.
Features
Figure 19 Pin Configuration
Ultra Low Power Operation
CMOS Electrically Erasable Technology
Development/Programmer Support
- V
- Icc = 10 µA (typical) at standby
- Icc = 2 mA (typical) at 1 MHz
- t
- Superior factory testing
-
-
- Third party software and programmers
- Anachip PLACE Development Software
DIP
PLCC
Reprogrammable in plastic package
Reduces retrofit and development costs
PD
CC
= 25ns.
= 5 Volts ±10%
CMOS Programmable Electrically Erasable Logic Device
I/CLK
TSSOP
GND
CC
I
I
I
I
I
I
I
I
I
I
) standby mode makes the
SOIC
1
12
2
3
4
5
6
7
8
9
10
11
24
23
22
21
20
19
18
17
16
15
14
13
PEEL™ 22CV10AZ -25
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
1/10
The PEEL™22CV10AZ is JEDEC file compatible with standard
22V10 PLDs. Eight additional configurations per macrocell (a
total of 12) are also available by using the “+” software/program-
ming option (i.e., 22CV10AZ+ & 22CV10AZ++). The additional
macrocell configurations allow more logic to be put into every
device, potentially reducing the design's component count and
lowering the power requirements even further.
Development
PEEL™22CV10AZ is provided by popular third-party program-
mers and development software. Anachip also offers free Win-
PLACE development software.
Figure 19 Block Diagram
Architectural Flexibility
Application Versatility
-
-
-
-
-
-
-
-
-
-
Programmable clock source and polarity
133 product terms x 44 input AND array
Up to 22 inputs and 10 I/O pins
12 possible macrocell configurations
Synchronous preset, asynchronous clear
Independent output enables
24-pin DIP/SOIC/TSSOP and 28-pin PLCC
Replaces random logic
Pin and JEDEC compatible with 22V10
Ideal for power-sensitive systems
and
programming
support
Rev. 1.0 Dec 16, 2004
for
the

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PEEL22CV10AZSI-25 Summary of contents

Page 1

CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Volts ±10 Icc = 10 µA (typical) at standby - Icc = 2 mA (typical MHz - t = 25ns. PD ...

Page 2

Figure 21 PEEL™22CV10AZ Logic Array Diagram Anachip Corp. www.anachip.com.tw 2/10 Rev. 1.0 Dec 16, 2004 ...

Page 3

Function Description The implements logic functions as sum-of-products expressions in a programmable-AND/fixed-OR logic array. User-defined functions are created by programming the connections of input signals into the array. User-configurable output structures in the form of I/O macrocells further increase logic ...

Page 4

In addition to emulating the four PAL-type output structures (configurations and 10), The macrocell provides eight additional configurations. Equivalent circuits for the twelve mac- rocell configurations are illustrated in Figure 22. These structures are accessed by specifying ...

Page 5

Figure 22 Equivalent Circuits for the Twelve Configurations of the PEEL™22CV10AZ+ I/O Macrocell Table 1. I/O Macrocell Equivalent Circuits Configuration # Bi-directional I ...

Page 6

Zero Power Feature The CMOS PEEL™22CV10AZ features “Zero-Power” standby operation for ultra-low power consumption. With the “Zero- Power” feature, transition-detection circuitry monitors the inputs, I/Os (including CLK) and feedbacks. If these signals do not change for a period of time ...

Page 7

Table 1. Absolute Maximum Ratings Symbol Parameter V Supply Voltage Voltage Applied to Any Pin Output Current O T Storage Temperature ST T Lead Temperature LT Table 2. Operating Range Symbol Parameter V ...

Page 8

Table 10. Over the operating range Symbol 5 t Input to non-registered output Input to output enable Input to output disable OD t Clock to Output CO1 t Clock to comb. Output delay via ...

Page 9

... Technology CMOS TTL Ordering Information Part Number PEEL22CV10AZP-25 (L) PEEL22CV10AZJ-25 (L) PEEL22CV10AZS-25 (L) PEEL22CV10AZT-25 (L) PEEL22CV10AZPI-25 (L) PEEL22CV10AZJI-25 (L) PEEL22CV10AZSI-25 (L) PEEL22CV10AZTI-25 (L) Part Number Package P = 24-pin Plastic 300 mil DIP J = 28-pin Plastic (J) Leaded Chip Carrier (PLCC 24-pin SOIC 300 mil Gullwing T = 24-pin TSSOP 170 mil Anachip Corp. www.anachip.com.tw R1 ...

Page 10

Anachip Corp. Head Office, 2F, No. 24-2, Industry E. Rd. IV, Science-Based Industrial Park, Hsinchu, 300, Taiwan Tel: +886-3-5678234 Fax: +886-3-5678368 Email: sales_usa@anachip.com Website: http://www.anachip.com ©2004 Anachip Corp. Anachip reserves the right to make changes in specifications at any time ...

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