RHF1201 STMICROELECTRONICS [STMicroelectronics], RHF1201 Datasheet
RHF1201
Related parts for RHF1201
RHF1201 Summary of contents
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... Output data can be coded in two different formats. A Data Ready signal which is raised when the data is valid on the output can be used for synchronization purposes. The RHF1201 is available in -55° +125° C temperature range small 48-pin hermetic SO-48 package. Rev 2 RHF1201 ...
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... Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 6 6 Electrical characteristics (unchanged after 300kRad Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7.1 RHF1201 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7.2 Driving the analog input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.2.1 7.2.2 7.2.3 7.3 Reference connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.3.1 7.3.2 7.4 Clock input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.5 Power consumption optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 ...
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... RHF1201 1 Block diagram Figure 1. Block diagram VIN INCM VINB CLK 2 Pin connections Figure 2. Pin connections (top view) +2.5V +2.5V/3.3V stage stage 1 2 Sequencer-phase shifting Timing Digital data correction GND Block diagram ...
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... V/3 Non connected 44 CC Non connected 45 DGND 2.5 V/3 CLK DGND 2 DGND RHF1201 Description Observation 2.5 V/3.3 V CMOS Slew rate control input input 2.5 V/3.3 V CMOS Output Enable input input 2.5 V/3.3 V CMOS Data Format Select input input Analog power supply 2.5 V Analog power supply 2.5 V Analog ground ...
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... RHF1201 4 Timing characteristics Table 2. Timing table Symbol F Sampling frequency S T Sampling clock cycle ck DC Clock duty cycle T Clock pulse width (high Clock pulse width (low) C2 Data output delay (fall clock to data valid) T Data pipeline delay pd Data ready delay after data ...
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... Forced top voltage V REFP reference Bottom internal reference V REFM voltage 6/18 Parameter (1) (1) (1) (1) - HBM Parameter Test conditions Values 3.6 -100 to 100 -65 to +150 Min Typ Max 2.3 2.5 2.7 2.3 2.5 2.7 2.3 2.5 2.7 2.3 2.5 3.4 0 0.5 RHF1201 Unit °C °C/W kV Unit ...
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... RHF1201 6 Electrical characteristics (unchanged after 300kRad) Test conditions, unless otherwise specified are MHz Table 5. Analog inputs Symbol Parameter V -V Full scale reference voltage IN INB C Input capacitance in R Input resistance in Effective resolution ERB (1) bandwidth 1. See Section 8: Definitions of specified parameters on page 14 Table 6 ...
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... MHz 145 MHz MHz MHz 145 MHz MHz MHz 145 MHz in for more information. RHF1201 Min Typ Max 0 0.2 V CCBE - 0.2 - Min Typ Max ±0.3 ±0.5 ±1.7 Guaranteed Min Typ Max -75 -63 -70 -57 ...
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... RHF1201 7 Application information The RHF1201 is a high speed analog to digital converter based on a pipeline architecture and a 0.25 µm CMOS process to achieve the best performance in terms of linearity and power consumption. The pipeline structure consists of 11 internal conversion stages in which the analog signal is fed and sequentially converted into digital data. Signal input is sampled on the rising edge of the clock ...
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... Driving the analog input 7.2.1 Differential inputs The RHF1201is designed to obtain optimum performance when driven on differential inputs transformer is an efficient way of achieving this high performance. Figure 4: Differential input configuration the primary of the transformer, while the secondary drives both ADC inputs. The common ...
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... In particular, the Track-and-Hold in the first stage of the pipeline is designed to minimize the linearity limitations as analog frequency increases.This is achieved by making the input impedance independent from the input frequency result, the RHF1201 can maintain high performance analog frequency of 150 MHz. ADT1-1 ...
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... VREFP VIN RHF1201 VINB VREFM to obtain optimum performance. 1kΩ VCCA VREFP VIN external reference RHF1201 VINB VREFM is internally set to a voltage close to REFP in order to minimize low and high for the schematics. 330pF 470nF 10nF Figure 7: External 470nF 330pF 10nF RHF1201 ...
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... Power consumption optimization The internal architecture of the RHF1201 makes it possible to optimize power consumption according to the sampling frequency of the application. For this purpose, an External R resistor is placed between the IPOL pin and the analog Ground. Therefore, the total dissipation can be adjusted across all the sampling range 0.5 Msps to 50 Msps to fulfil the requirements of applications where power saving is a must ...
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... The effective number of bits (ENOB) is easily deduced from the SINAD, using the formula: SINAD = 6.02 × ENOB + 1.76 dB. When the applied signal is not full scale (FS), but has an amplitude A expression becomes: SINAD = 6.02 × ENOB + 1. log (2A The ENOB is expressed in bits. 14/ excluding DC, fundamental and the first five s /FS) 0 RHF1201 , the SINAD 0 ...
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... RHF1201 Effective resolution bandwidth For a given sampling rate and clock jitter, the analog input frequency at which the SINAD is reduced of 3 dB. Pipeline delay Delay between the initial sample of the analog input and the availability of the corresponding digital data output on the output bus. Also called data latency expressed as a number of clock cycles ...
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... Max. 2.18 2.47 2.72 0.20 0.254 0.30 0.12 0.15 0.18 15.57 15.75 15.92 9.52 9.65 9.78 10.90 6.22 6.35 6.48 1.52 1.65 1.78 0.635 0.20 12.28 12.58 12.88 1.30 1.45 1.60 0.66 0.79 0.92 0.25 0.43 0.61 RHF1201 Inches Min. Typ. Max. 0.086 0.097 0.107 0.008 0.010 0.012 0.005 0.006 0.007 0.613 0.620 0.627 0.375 0.380 0.385 0.429 0.245 0.250 0.255 0.060 0.065 0.070 0.025 0.008 0.483 0.495 0.507 0.051 0.057 0.063 0.026 0.031 0.036 ...
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... Revision 1 Initial release in new format. Updated failure immune and latchup immune value /mg. 2 Updated package mechanical data. Removed reference to non rad-hard components from External reference on page Ordering information Package Marking SO-48 RHF1201KSO1 SO-48 RHF1201KSO2 SO-48 F0521701VXC Changes 120 MeV- Section 7.3.2: 12. 17/18 ...
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