HDSP-2301 HP [Agilent(Hewlett-Packard)], HDSP-2301 Datasheet - Page 11

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HDSP-2301

Manufacturer Part Number
HDSP-2301
Description
Four Character 5.0 mm (0.20 inch) 5 x 7 Alphanumeric Displays
Manufacturer
HP [Agilent(Hewlett-Packard)]
Datasheet
two 14-bit serial-in-parallel-out
shift registers. The LED matrix for
each character is a 5 x 7 diode ar-
ray organized with the anodes of
each column tied in common and
the cathodes of each row tied in
common. The 7 row cathode com-
mons of each character are tied to
the constant current sinking out-
puts of 7 successive stages of the
shift register. The like columns of
the 4 characters are tied together
and brought to a single address
pin (i.e., column 1 of all 4 charac-
ters is tied to pin 1, etc.). In this
way, any diode in the four 5 x 7
matrices may be addressed by
shifting data to the appropriate
shift register location and apply-
ing a voltage to the appropriate
column.
The serial-in-parallel-out (SIPO)
shift register has a constant cur-
rent sinking output associated
with each shift register stage. This
constant current output drives
each LED at a nominal peak cur-
rent of 12 to 14 mA peak. The
output stage is a current mirror
design with a nominal current
gain of 10. A logical 1 loaded into
each shift register bit will turn
“ON” the corresponding current
source provided that a logical 1 is
applied to the Blanking Input, V
If V
ate Column Input, the
corresponding LED diode will be
turned “ON”. Since the row driv-
ers have a constant current
output, the LED current will re-
main constant as long as the
Column Input voltage exceeds 2.4
V for red and 2.75 V for high effi-
ciency red, yellow, and high
performance green devices.
Data is loaded serially into the
shift register on the high to low
transition of the Clock Input.
COL
is applied to the appropri-
B
.
During the time that data is being
loaded into the display, the col-
umn current must be disabled to
minimize the generation of “cur-
rent spikes” between V
columns, and ground. The result-
ing power supply noise could
induce noise on the Clock and
Data Inputs. The column current
can be disabled either by switch-
ing off the column drivers or by
applying a logical 0 to the Blank-
ing Input.
The Data Output terminal is a TTL
buffer interface to the 28th bit of
the shift register (i.e., the 7th row
of character 4 in each package)
The Data Output is arranged to
directly interconnect to the Data
Input on a succeeding 4 digit
HDSP-2000 display package. The
Data, Clock and V
buffered to allow direct interface
to any TTL logic family.
Theory of Operation
Dot matrix alphanumeric display
systems generally have a logical
organization which prescribes
that any character be generated as
a combination of several subsets
of data. In a 5 x 7 matrix, this
could be either 5 subsets of 7 bits
each or 7 subsets of 5 bits each.
This technique is utilized to re-
duce from 35 to 5 or 7 the number
of outputs required from the char-
acter generator. In order to
display a complete character,
these subsets of data are then pre-
sented sequentially to the
appropriate locations of the dis-
play matrix. If this process is
repeated at a rate which insures
that each of the appropriate ma-
trix locations is reenergized a
minimum of 100 times per second,
the eye will perceive a continuous
image of the entire character. The
apparent intensity of each of the
display elements will be equal to
B
inputs are all
CC
, the
the intensity of that element dur-
ing the “ON” period multiplied by
the ratio of “ON” time to refresh
period. This ratio is referred to as
the display duty factor, and the
technique is referred to as
“strobing”. In the case of HDSP-
2000, each character is made up
of 5 subsets of 7 bits. For a four
character display, 28 bits repre-
senting the first subset of each of
the four characters are loaded se-
rially into the on-board SIPO shift
register and the first column is
then energized for a period of
time, T. This process is then re-
peated for columns 2 through 5. If
the time required to load the 28
bits into the SIPO shift register is
t, then the duty factor is:
the term 5(t + T) is then the re-
fresh period. For satisfactory
display, the refresh period should
be:
or conversely
which gives
The time averaged luminous
intensity of the display can be
varied continuously over a range
greater than 1000 to 1 by turning
off or blanking the display
before loading new data into the
SIPO shift register. If the time
that the display is blanked is T
then the duty factor of the
display becomes:
3
1 5
D F
5
t T
/
. .
t T
t T
5
2
t T
T
10
m
sec.
m sec,
100
;
Hz
B
( )
( )
( )
,
( )
2
3
4
1

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