AX88172A ASIX [ASIX Electronics Corporation], AX88172A Datasheet - Page 15

• Manufacturer Part Number: AX88172A
• Description: USB 2.0 to 10/100M Fast Ethernet Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

FDX_LED
SPEED_LED
RESET_N
EXTWAKEUP_N
GPIO_2
GPIO_1
GPIO_0/PME
SI_3
SI_2
SI_1
SI_0
USB_LED
TEST0
TEST1
TCLK_EN
TCLK_0
TCLK_1
VCC3R3
GND3R3
V18F
VCCK
VCC3IO
GND
VCC33A_H
GND33A_H
VCC33A_PLL
GND33A_PLL
VCC3A3
GND3A3
VCC18A
I5/PU/S
I5/PU/S
I5/PD/S
B5/PD
B5/PD
B5/PD
B5/PU
B5/PU
B5/PU
B5/PU
I5/PD
I5/PD
I5/S
I5/S
O5
O5
O5
P
P
P
P
P
P
P
P
P
P
P
P
P
13, 14, 21, 25,
15, 16, 23, 34,
18
19
42
24
26
27
28
29
30
31
32
22
44
43
40
39
38
11
12
10
33, 47, 50
17, 41, 49
45, 46, 60
6, 61
53
54
58
59
2
3
Full Duplex and collision detected LED indicator. This pin drives low when
the Ethernet PHY is in full-duplex mode and drives high when in half
duplex mode. When in half duplex mode and the Ethernet PHY detects
collision, it will be driven low (or blinking).
Ethernet speed LED indicator. This pin drives low when the Ethernet PHY
is in 100BASE-TX mode and drives high when in 10BASE-T mode.
Chip reset input. Active low. This is the external reset source used to reset
this chip. This input feeds to the internal power-on reset circuitry, which
provides the main reset source of this chip. After completing reset,
EEPROM data will be loaded automatically.
Remote-wakeup trigger from external pin. EXTWAKEUP_N should be
asserted low for more than 2 cycles of 12MHz clock to be effective.
General Purpose Input/ Output Pin 2.
General Purpose Input/ Output Pin 1. This pin is default as input pin after
power-on reset. This pin is also for Default WOL Ready Mode setting;
please refer to section
General Purpose Input/ Output Pin 0 or PME (Power Management Event).
This pin is default as input pin after power-on reset. GPIO_0 also can be
defined as PME output to indicate wake up event detected. Please refer to
section
UART_RX or SPI_MISO. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
UART_TX or SPI_MOSI. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
I2C_SDA or SPI_SS. This is a multi-function pin determined by EEPROM
Flag [1] setting. Please refer to section
I2C_SCLK or SPI_SCLK. This is a multi-function pin determined by
EEPROM Flag [1] setting. Please refer to section
USB Speed indicator: When USB bus is in Full speed, this pin drives high
continuously. When USB bus is in High speed, this pin drives low
continuously. This pin drives high and low in turn (blinking) to indicate TX
data transfer going on whenever the host controller sends bulk out data
transfer.
Test pin. For normal operation, user should connect to ground.
Test pin. For normal operation, user should connect to ground.
Test pin. For normal operation, user should keep this pin NC.
Test pin. For normal operation, user should keep this pin NC.
Test pin. For normal operation, user should keep this pin NC.
3.3V Power supply to on-chip 3.3V to 1.8V voltage regulator.
Ground pin of on-chip 3.3V to 1.8V voltage regulator.
1.8V voltage output of on-chip 3.3V to 1.8V voltage regulator.
Power and Ground Pins
On-chip Regulator Pins
2.3
Digital Core Power. 1.8V.
Digital I/O Power. 3.3V.
Digital Ground.
Analog Power for USB transceiver. 3.3V.
Analog Ground for USB transceiver.
Analog Power for USB PLL. 3.3V.
Analog Ground for USB PLL.
Analog Power for Ethernet PHY bandgap. 3.3V.
Analog Ground for Ethernet PHY.
Analog Power for Ethernet PHY and 25Mhz crystal oscillator.
1.8V.
USB 2.0 to 10/100M Fast Ethernet Controller
Settings.
Misc. Pins
15
2.3
Settings.
ASIX ELECTRONICS CORPORATION
2.3
AX88772A/AX88172A
Settings.
2.3
2.3
2.3
Low-pin-count
Settings.
Settings.
Settings.