8533AG-01LFT IDT, 8533AG-01LFT Datasheet

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8533AG-01LFT

Manufacturer Part Number
8533AG-01LFT
Description
Clock Drivers & Distribution 1-to-4 LVPECL Fanout Buffer
Manufacturer
IDT
Datasheet

Specifications of 8533AG-01LFT

Rohs
yes
Part # Aliases
ICS8533AG-01LFT

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B
8533AG-01
G
The ICS8533-01 is a low skew, high performance 1-to-4
Differential-to-3.3V LVPECL Fanout Buffer. The ICS8533-
01 has two selectable clock inputs. The CLK, nCLK pair
can accept most standard differential input levels. The
PCLK, nPCLK pair can accept LVPECL, CML, or SSTL
input levels. The clock enable is internally synchronized to
eliminate runt pulses on the outputs during asynchronous
assertion/deassertion of the clock enable pin. Guaranteed
output and part-to-part skew characteristics make the
ICS8533-01 ideal for those applications demanding well
defined performance and repeatability.
LOCK
ENERAL
CLK_SEL
CLK_EN
nPCLK
PCLK
nCLK
CLK
D
IAGRAM
D
ESCRIPTION
0
1
D
LE
Q
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
D
www.idt.com
IFFERENTIAL
1
F
P
Four differential 3.3V LVPECL outputs
Selectable differential CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency: 650MHz
Translates any single-ended input signal to 3.3V
LVPECL levels with resistor bias on nCLK input
Output skew: 30ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 1.4ns (maximum)
Additive phase jitter, RMS: 0.06ps (typical)
3.3V operating supply
0°C to 70°C ambient operating temperature
Lead-Free packages available
Industrial temperature information available upon request
EATURES
IN
A
SSIGNMENT
-
6.5mm x 4.4mm x 0.92mm package body
TO
-3.3V LVPECL F
CLK_SEL
CLK_EN
nPCLK
PCLK
nCLK
CLK
V
V
nc
nc
CC
EE
20-Lead TSSOP
ICS8533-01
G Package
Top View
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
L
ICS8533-01
OW
Q0
nQ0
V
Q1
nQ1
Q2
nQ2
V
Q3
nQ3
CC
CC
ANOUT
S
KEW
REV. F AUGUST 4, 2010
, 1-
B
UFFER
TO
-4

Related parts for 8533AG-01LFT

8533AG-01LFT Summary of contents

Page 1

... IAGRAM D CLK_EN Q LE CLK 0 nCLK PCLK 1 nPCLK CLK_SEL 8533AG- -3.3V LVPECL F IFFERENTIAL TO F EATURES Four differential 3.3V LVPECL outputs Selectable differential CLK, nCLK or LVPECL clock inputs CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL PCLK, nPCLK supports the following input types: ...

Page 2

... 8533AG- IFFERENTIAL ...

Page 3

... 8533AG- IFFERENTIAL TO T ABLE ...

Page 4

... D - IFFERENTIAL 4.6V NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the -0. 0.5V CC device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be- 50mA yond those listed in the DC Characteristics or AC Character- 100mA istics is not implied ...

Page 5

... 8533AG- IFFERENTIAL 3.3V±5 0°C 70° ...

Page 6

... As with most timing specifications, phase noise measurements have issues. The primary issue relates to the limitations of the equipment. Often the noise floor of the equipment is higher than the noise floor of the device. This is illustrated above. The de- 8533AG- -3.3V LVPECL F IFFERENTIAL ...

Page 7

... UTPUT OAD EST IRCUIT nQx Qx nQy Qy t sk( UTPUT KEW 80% Clock 20% Outputs UTPUT ISE ALL IME 8533AG- -3.3V LVPECL F IFFERENTIAL EASUREMENT NFORMATION V CC SCOPE Qx nPCLK, nCLK PCLK, CLK nQx IFFERENTIAL NPUT nPCLK, nCLK PCLK, CLK nQ0:nQ3 ...

Page 8

... RTT = – 2)) – 3A. LVPECL O IGURE UTPUT 8533AG- IFFERENTIAL PPLICATION NFORMATION CCEPT INGLE NDED EVELS of R1 and R2 might need to be adjusted to position the V_REF the center of the input voltage swing. For example, if the input CC clock swing is only 2 ...

Page 9

... R5,R6 locate near the driver pin. F 4E. CLK/ CLK I D IGURE N NPUT RIVEN BY 3.3V LVPECL D RIVER WITH 8533AG- IFFERENTIAL TO examples only. Please consult with the vendor of the driver and V must meet component to confirm the driver termination requirements. For OH example in Figure 4A, the input termination applies for LVHSTL drivers ...

Page 10

... F 5E. PCLK/nPCLK I D IGURE NPUT RIVEN SSTL RIVER 8533AG- IFFERENTIAL TO are examples only. If the driver is from another vendor, use must meet the V their termination recommendation. Please consult with the OH PP vendor of the driver component to confirm the driver termination requirements. ...

Page 11

... R ABLE HERMAL ESISTANCE FOR JA Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. 8533AG- IFFERENTIAL OWER ONSIDERATIONS = 3. 3.465V, which gives worst case results. ...

Page 12

... Pd_L is the power dissipation when the output drives low. Pd_H = [(V – 2V))/ OH_MAX CC_MAX L [(2V - 0.9V)/ 0.9V = 19.8mW Pd_L = [(V – 2V))/ OL_MAX CC_MAX L [(2V - 1.7V)/ 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW 8533AG- IFFERENTIAL LVPECL D C RIVER IRCUIT AND – 0.9V CC_MAX – 1.7V CC_MAX - [( ...

Page 13

... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS8533-01 is: 404 8533AG- IFFERENTIAL ELIABILITY ...

Page 14

... ACKAGE UTLINE UFFIX FOR T ABLE Reference Document: JEDEC Publication 95, MS-153 8533AG- IFFERENTIAL TO TSSOP EAD ACKAGE IMENSIONS ...

Page 15

... Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. 8533AG-01 D ...

Page 16

... 8533AG- IFFERENTIAL ...

Page 17

... Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA 8533AG- -3.3V LVPECL F ...

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