ISL26134AVZ-T7A Intersil, ISL26134AVZ-T7A Datasheet - Page 18

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ISL26134AVZ-T7A

Manufacturer Part Number
ISL26134AVZ-T7A
Description
Analog to Digital Converters - ADC ISL26134AVZ LW-NOISE 24BIT DELTASIGMA ADC
Manufacturer
Intersil
Datasheet

Specifications of ISL26134AVZ-T7A

Product Category
Analog to Digital Converters - ADC
Rohs
yes
Number Of Channels
4
Architecture
Sigma-Delta
Conversion Rate
80 sps
Resolution
24 bit
Input Type
Differential
Snr
No
Interface Type
Serial (2-Wire)
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 105 C
Package / Case
TSSOP-28
Maximum Power Dissipation
68 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
External
Operation of PDWN
PDWN must transition from low to high after both power supplies
have settled to specified levels in order to initiate a correct
power-up reset (Figure 35). This can be implemented by an
external controller or a simple RC delay circuit, as shown in
Figure 36.
In order to reduce power consumption, the user can assert the
Power-down mode by bringing PDWN Low as shown in Figure 37.
All circuitry is shut down in this mode, including the Crystal
Oscillator. After PDWN is brought High to resume operation, the
reset delay varies depending on the clock source used. While an
external clock source will resume operation immediately, a
circuit utilizing a crystal will incur about a 20 millisecond delay
due to the inherent start-up time of this type of oscillator.
PARAMETER
t
t
13
14
SDO/RDY
Clock Recovery after PDWN
High
PDWN Pulse Duration
PDWN
SCLK
18
DESCRIPTION
FIGURE 37. POWER-DOWN MODE WAVEFORMS
TABLE 14. POWER-DOWN RECOVERY TIMING
ISL26132, ISL26134
POWER-DOWN
Internal Oscillator
External Clock Source
4.9152MHz Crystal
Oscillator
MODE
t14
t
14
WAKEUP
SOURCE
CLK
FIGURE 35. POWER-DOWN TIMING RELATIVE TO SUPPLIES
t
13
CONVERSION
START
FIGURE 36. PDWNDELAY CIRCUIT
PDWN
DVDD
AVDD
t
11
D
VDD
7.95
0.16
TYP
5.6
26
1kΩ
2.2nF
READY
DATA
CONNECT TO
PDWN PIN
≥10µs
µs (min)
UNITS
September 9, 2011
ms
µs
µs
FN6954.1

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