SSTVF16859BGLF IDT, Integrated Device Technology Inc, SSTVF16859BGLF Datasheet - Page 8

• Manufacturer Part Number: SSTVF16859BGLF
• Description: IC REGISTER BUFF 13-26B 64-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 74SSTVFr

Specifications of SSTVF16859BGLF

• Logic Type: 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs
• Supply Voltage: 2.3 V ~ 2.7 V
• Number Of Bits: 13, 26
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-TSSOP
• Logic Family: SSTV
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Inputs: 13
• Number Of Outputs: 26
• High Level Output Current: -16mA
• Low Level Output Current: 16mA
• Propagation Delay Time: 3.5ns
• Operating Supply Voltage (typ): 2.6V
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 210(Min)MHz
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ICSSSTVF16859B
1019B—03/15/05
Notes:
LVCMOS
RESET#
(see note 2)
Input
Timing
Input
Input
1. CL incluces probe and jig capacitance.
2. I
3. All input pulses are supplied by generators having the following characteristics: PRR @10 MHz,
4. The outputs are measured one at a time with one transition per measurement.
5. V
6. V
7. V
8. t
Input
I
DD
t
Zo=50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
inact
DD
PLH
TT
IH
IL
Voltage Waveforms - Setup and Hold Times
= V
tested with clock and data inputs held at V
= V
= V
Voltage Waveforms - Pulse Duration
and t
V
REF
REF
REF
Voltage and Current Waveforms
Inputs Active and Inactive Times
REF
10%
V
PHL
Figure 1 - Parameter Measurement Information (V
DDQ
- 310mV (AC voltage levels) for differential inputs. V
+ 310mV (AC voltage levels) for differential inputs. V
= V
/2
V
are the same as t
REF
DDQ
t
S
/2
t
w
V
ICR
t
h
V
V
V
REF
REF
pd
DDQ
From Output
/2
Under Test
90%
t
act
V
V
0 V
I
I
V
V
V
V
DDH
DDL
I(pp)
DDQ
IH
IL
IH
IL
(see Note 1)
C
L
8
= 30 pF
DDQ
LVCMOS
RESET#
Timing
Output
Input
Output
Input
Load Circuit
Test Point
or GND, and I
t
PHL
Voltage Waveforms - Propagation Delay Times
Voltage Waveforms - Propagation Delay Times
DDQ
V
IL
IH
ICR
O
V
= GND for LVCMOS input.
DD
= 2.5V ±0.2V)
= V
= 0 mA.
V
/2
TT
DDQ
500Ω
for LVCMOS input.
V
V
ICR
TT
t
PHL
V
TT
t
PHL
V
V
V
V
V
V
V
I(pp)
IH
IL
OH
OL
OH
OL