74LVX3245MTCX Fairchild Semiconductor, 74LVX3245MTCX Datasheet - Page 5

• Manufacturer Part Number: 74LVX3245MTCX
• Description: IC TRANSCEIVER 8BIT 24TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74LVXr

Specifications of 74LVX3245MTCX

• Logic Function: Translator, 3-State
• Number Of Bits: 8
• Input Type: Logic
• Output Type: Logic
• Number Of Channels: 8
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Propagation Delay (max): 5.6ns
• Voltage - Supply: 2.7 V ~ 3.6 V, 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-TSSOP
• Supply Voltage: *
• Logic Type: CMOS
• Logic Family: 74LVX
• Number Of Channels Per Chip: 8
• Input Level: CMOS
• Output Level: CMOS
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Propagation Delay Time: 8 ns
• Supply Voltage (max): 3.6 V, 5.5 V
• Supply Voltage (min): 2.7 V, 4.5 V
• Maximum Operating Temperature: + 85 C
• Function: 8-Bit Dual Supply Bus Transceiver with Voltage Translation
• Input Bias Current (max): 8 uA
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Circuits: 2
• Polarity: Non-Inverting
• Operating Supply Voltage (typ): 3.3/5V
• Number Of Elements: 1
• Input Logic Level: CMOS
• Output Logic Level: CMOS
• Package Type: TSSOP
• Logical Function: Bus Transceiver with Voltage Translation
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 5.5V
• Technology: CMOS
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Additional Features: W/Volt Translation
• Pin Count: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LVX3245MTCX; 74LVX3245MTCXTR

C
C
C
74LVX3245
Symbol
Capacitance
Note 9: C
8-Bit Dual Supply Translating Transceiver
The LVX3245 is a dual supply device capable of bidirec-
tional signal translation. This level shifting ability provides
an efficient interface between low voltage CPU local bus
with memory and a standard bus defined by 5V I/O levels.
The device control inputs can be controlled by either the
low voltage CPU and core logic or a bus arbitrator with 5V
I/O levels.
Manufactured on a sub-micron CMOS process, the
LVX3245 is ideal for mixed voltage applications such as
notebook computers using 3.3V CPU's and 5V peripheral
devices.
Power Up Considerations
To insure that the system does not experience unneces-
sary I
power up, the following guidelines should be adhered to
(refer to Table 1):
• Power up the control side of the device first. This is the
• OE should ramp with or ahead of V
• The Transmit/Receive control pin (T/R) should ramp with
Please reference Application Note AN-5001 for more detailed information on using Fairchild’s LVX Low Voltage Dual
Supply CMOS Translating Transceivers.
IN
I/O
PD
Device Type
V
guard against bus contention.
V
CCA
CCA
CC
PD
.
, this will ensure that the A Port data pins are con-
Input Capacitance
Input/Output
Capacitance
Power Dissipation
Capacitance (Note 9)
current draw, bus contention, or oscillations during
is measured at 10 MHz
(power up 1st)
V
3V
CCA
TABLE 1. Low Voltage Translator Power Up Sequencing Table
configurable
Parameter
V
5V
CCB
CCA
. This will help
with V
ramp
T/R
A → B
B → A
CCA
5
• A side data inputs should be driven to a valid logic level.
The above steps will ensure that no bus contention or oscil-
lations, and therefore no excessive current draw occurs
during the power up cycling of these devices. These steps
will help prevent possible damage to the translator devices
and potential damage to other system components.
with V
figured as inputs. With V
I/O Port should be configured as inputs to help guard
against bus contention and oscillations.
This will prevent excessive current draw.
ramp
OE
CCA
Typ
4.5
15
55
40
0V or V
A Side I/O
Units
pF
pF
pF
logic
CCA
V
V
V
V
V
CC
CCA
CCB
CCB
CCA
CCA
= Open
= 3.3V
= 5.0V
= 5.0V
= 3.3V
receiving power first, the A
B Side I/O
outputs
Conditions
www.fairchildsemi.com
Floatable Pin
Allowed
No