M24C64-DFDW6TP STMicroelectronics, M24C64-DFDW6TP Datasheet - Page 18

• Manufacturer Part Number: M24C64-DFDW6TP
• Description: EEPROM 64 Kbit Serial I2C 1.7V to 5.5V EEPROM
• Manufacturer: STMicroelectronics

Specifications of M24C64-DFDW6TP

• Product Category: EEPROM
• Rohs: yes

Instructions
5.1.5
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ECC (Error Correction Code) and Write cycling
The Error Correction Code (ECC) is an internal logic function which is transparent for the
I
The ECC logic is implemented on each group of four EEPROM bytes
single bit out of the four bytes happens to be erroneous during a Read operation, the ECC
detects this bit and replaces it with the correct value. The read reliability is therefore much
improved.
Even if the ECC function is performed on groups of four bytes, a single byte can be
written/cycled independently. In this case, the ECC function also writes/cycles the three
other bytes located in the same group
defined at group level and the cycling can be distributed over the 4 bytes of the group: the
sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain
below the maximum value defined
a. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an
2
C communication protocol.
integer.
Doc ID 16891 Rev 27
Table 11: Cycling performance by groups of four
(a)
. As a consequence, the maximum cycling budget is
M24C64-W M24C64-R M24C64-F M24C64-DF
(a)
. Inside a group, if a
bytes.