SST25VF040B-50-4I-SAF Microchip Technology, SST25VF040B-50-4I-SAF Datasheet - Page 15

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SST25VF040B-50-4I-SAF

Manufacturer Part Number
SST25VF040B-50-4I-SAF
Description
Flash 4M (512Kx8) 50MHz 2.7-3.6V Industrial
Manufacturer
Microchip Technology
Datasheet

Specifications of SST25VF040B-50-4I-SAF

Product Category
Flash
Rohs
yes

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©2011 Silicon Storage Technology, Inc.
4-KByte Sector-Erase
The Sector-Erase instruction clears all bits in the selected 4 KByte sector to FFH. A Sector-Erase
instruction applied to a protected memory area will be ignored. Prior to any Write operation, the Write-
Enable (WREN) instruction must be executed. CE# must remain active low for the duration of any com-
mand sequence. The Sector-Erase instruction is initiated by executing an 8-bit command, 20H, fol-
lowed by address bits [A
determine the sector address (SA
before the instruction is executed. The user may poll the Busy bit in the software status register or wait
T
Erase sequence.
Figure 12:Sector-Erase Sequence
SE
for the completion of the internal self-timed Sector-Erase cycle. See Figure 12 for the Sector-
SCK
CE#
23
SO
SI
-A
0
MODE 3
MODE 0
]. Address bits [A
X
), remaining address bits can be V
MSB
0 1 2 3 4 5 6 7 8
15
20
HIGH IMPEDANCE
MS
-A
12
] (A
MSB
ADD.
4 Mbit SPI Serial Flash
MS
= Most Significant address) are used to
15 16
ADD.
IL
23 24
or V
1295 SecErase.0
ADD.
IH.
CE# must be driven high
31
SST25VF040B
S71295-06-000
Data Sheet
02/11

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