SST25VF032B-66-4C-S2AF Microchip Technology, SST25VF032B-66-4C-S2AF Datasheet - Page 10

• Manufacturer Part Number: SST25VF032B-66-4C-S2AF
• Description: Flash 32Mbit 66MHz SPI Industrial Temp
• Manufacturer: Microchip Technology

Specifications of SST25VF032B-66-4C-S2AF

• Product Category: Flash
• Rohs: yes
• Memory Size: 32 Mbit
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8

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©2011 Silicon Storage Technology, Inc.
Read (25 MHz)
Table 5: Device Operation Instructions (Continued) (2 of 2)
The Read instruction, 03H, supports up to 25 MHz Read. The device outputs the data starting from the
specified address location. The data output stream is continuous through all addresses until termi-
nated by a low to high transition on CE#. The internal address pointer will automatically increment until
the highest memory address is reached. Once the highest memory address is reached, the address
pointer will automatically increment to the beginning (wrap-around) of the address space. For example,
once the data from address location 3FFFFFH has been read, the next output will be from address
location 000000H.
The Read instruction is initiated by executing an 8-bit command, 03H, followed by address bits [A
A
sequence.
Figure 5: Read Sequence
Instruction
EBSY
DBSY
0
SCK
CE#
]. CE# must remain active low for the duration of the Read cycle. See Figure 5 for the Read
SO
1. One bus cycle is eight clock periods.
2. Address bits above the most significant bit can be either V
3. 4KByte Sector Erase addresses: use A
4. 32KByte Block Erase addresses: use A
5. 64KByte Block Erase addresses: use A
6. To continue programming to the next sequential address location, enter the 8-bit command, ADH, followed by 2 bytes of
7. The Read-Status-Register is continuous with ongoing clock cycles until terminated by a low to high transition on CE#.
8. Manufacturer’s ID is read with A
SI
data to be programmed. Data Byte 0 will be programmed into the initial address [A
programmed into the
initial address [A
turer’s ID and device ID output stream is continuous until terminated by a low-to-high transition on CE#.
MODE 3
MODE 0
MSB
0 1 2 3 4 5 6 7 8
23
-A
03
1
] with A
Description
Enable SO as an out-
put RY/BY# status dur-
ing AAI programming
Disable SO as RY/BY#
status during AAI pro-
gramming
HIGH IMPEDANCE
0
= 1.
0
= 0, and Device ID is read with A
MSB
ADD.
MS
MS
MS
-A
15 16
-A
-A
10
12,
15,
16,
ADD.
remaining addresses are don’t care but must be set either at V
remaining addresses are don’t care but must be set either at V
remaining addresses are don’t care but must be set either at V
Op Code Cycle
0111 0000b (70H)
1000 0000b (80H)
23 24
ADD.
IL
or V
MSB
31 32
32 Mbit SPI Serial Flash
IH
D
1
.
0
OUT
N
= 1. All other address bits are 00H. The Manufac-
Cycle(s)
Address
39 40
D
0
0
N+1
OUT
2
47 48
23
Cycle(s)
-A
Dummy
D
N+2
1
OUT
] with A
0
0
SST25VF032B
55 56
0
D
N+3
=0, Data Byte 1 will be
Cycle(s)
OUT
Data
0
0
S71327-04-000
63 64
D
N+4
Data Sheet
1327 F06.0
OUT
Frequency
Maximum
80 MHz
80 MHz
IL
IL
IL
70
T5.0 1327
or V
or V
or V
IH.
IH.
IH.
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