FT240XQ-R FTDI, FT240XQ-R Datasheet - Page 10

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FT240XQ-R

Manufacturer Part Number
FT240XQ-R
Description
USB Interface IC USB to Parallel FIFO IC QFN-24
Manufacturer
FTDI
Datasheet

Specifications of FT240XQ-R

Rohs
yes
Product
USB 2.0
Data Rate
12 Mbps, 480 Mbps
Interface Type
USB
Operating Supply Voltage
2.97 V to 5.5 V
Operating Supply Current
8 mA to 8.4 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-24
Tradename
X-Chip

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FT240XQ-R
Manufacturer:
FTDI
Quantity:
16 046
Pin No.
13
7
20
19
Table 3.7 Miscellaneous Signal Group
Pin No.
21
1
23
6
22
4
5
2
8
9
17
18
Table 3.8 FIFO Interface Group (see note 2)
Notes:
When used in Input Mode, the input pins are pulled to VCCIO via internal 200kΩ resistors. These
pins can be programmed to gently pull low during USB suspend (PWREN# = “1”) by setting an
option in the internal MTP
Name
RESET#
SIWU#
CBUS5
CBUS6
Name
D0
D1
D2
D3
D4
D5
D6
D7
RD#
WR
TXE#
RXF#
Type
Input
Input
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Input
Input
Output
Output
I/O
I/O
Copyright © 2013 Future Technology Devices International Limited
Description
FIFO Data Bus Bit 0
FIFO Data Bus Bit 1
FIFO Data Bus Bit 2
FIFO Data Bus Bit 3
FIFO Data Bus Bit 4
FIFO Data Bus Bit 5
FIFO Data Bus Bit 6
FIFO Data Bus Bit 7
Enables the current FIFO data byte on D0...D7 when low. Fetched the next FIFO
data byte (if available) from the receive FIFO buffer when RD# goes from high to
low. See Section 3.6 for timing diagram.
Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR
goes from high to low. See Section 3.7 for timing diagram.
When high, do not write data into the FIFO. When low, data can be written into
the FIFO by strobing WR high, then low. During reset this signal pin is tri-state.
See Section 3.7 for timing diagram.
When high, do not read data from the FIFO. When low, there is data available in
the FIFO which can be read by strobing RD# low, then high again. During reset
this signal pin is tri-state. See Section 3.6 for timing diagram.
If the Remote Wakeup option is enabled in the internal MTP
suspend mode (PWREN# = 1) RXF# becomes an input. This can be used to wake
up the USB host from suspend mode by strobing this pin low for a minimum of
20ms which will cause the device to request a resume on the USB bus.
Description
Active low reset pin. This can be used by an external device to reset the
FT240X. If not required can be left unconnected, or pulled up to VCC.
Active low input. May be used to flush the IC buffer back to the PC (Send
Immediate) or if the PC is in suspend mode it can be used as a Wake Up
signal.
Configurable CBUS I/O Pin. Function of this pin is configured in the
device MTP memory. See CBUS Signal Options, Table 3.9.
Configurable CBUS I/O Pin. Function of this pin is configured in the
device MTP memory. See CBUS Signal Options, Table 3.9.
memory
.
FT240X USB 8-BIT FIFO IC Datasheet
Document No.: FT_000626 Clearance No.:
memory
Version 1.3
FTDI# 259
, during USB
10

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