C8051F544-IMR Silicon Labs, C8051F544-IMR Datasheet - Page 251

• Manufacturer Part Number: C8051F544-IMR
• Description: 8-bit Microcontrollers - MCU 50 MIPS 8 kB 1kB LIN 2.1 SPI UART I2C
• Manufacturer: Silicon Labs

Specifications of C8051F544-IMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

24.2. PCA0 Interrupt Sources
Figure 24.3 shows a diagram of the PCA interrupt tree. There are five independent event flags that can be
used to generate a PCA0 interrupt. They are as follows: the main PCA counter overflow flag (CF), which is
set upon a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on
an overflow from the 8th, 9th, 10th, or 11th bit of the PCA0 counter, and the individual flags for each PCA
channel (CCF0, CCF1, CCF2, CCF3, CCF4, and CCF5), which are set according to the operation mode of
that module. These event flags are always set when the trigger condition occurs. Each of these flags can
be individually selected to generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF
for CF, ECOV for COVF, and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any
individual interrupt sources are recognized by the processor. PCA0 interrupts are globally enabled by set-
ting the EA bit and the EPCA0 bit to logic 1.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
L
K
C
P
S
2
000
001
010
011
100
101
C
P
S
1
C
P
S
0
E
C
F
Figure 24.2. PCA Counter/Timer Block Diagram
IDLE
C
F
C
R
PCA0CN
C
C
F
5
C
C
F
4
C
C
F
3
C
C
F
2
C
C
F
1
C
C
F
0
Rev. 1.1
0
1
PCA0L
read
Snapshot
Register
PCA0H
PCA0L
To SFR Bus
To PCA Modules
Overflow
C8051F54x
CF
To PCA Interrupt System
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