IDT74LVCH16601APVG8 IDT, Integrated Device Technology Inc, IDT74LVCH16601APVG8 Datasheet

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IDT74LVCH16601APVG8

Manufacturer Part Number
IDT74LVCH16601APVG8
Description
IC UNIV BUS TXRX 18BIT 56SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
74LVCHr
Datasheet

Specifications of IDT74LVCH16601APVG8

Logic Type
Universal Bus Transceiver, CMOS
Number Of Circuits
18-Bit
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVCH16601APVG8
FEATURES:
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• CMOS power levels (0.4μ μ μ μ μ W typ. static)
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP package
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FUNCTIONAL BLOCK DIAGRAM
© 2006 Integrated Device Technology, Inc.
IDT74LVCH16601A
3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
machine model (C = 200pF, R = 0)
CC
CC
= 3.3V ± 0.3V, Normal Range
= 2.7V to 3.6V, Extended Range
INDUSTRIAL TEMPERATURE RANGE
SK(o)
(Output Skew) < 250ps
CLKENAB
CLKENBA
CLKAB
CLKBA
OEAB
OEBA
LEAB
LEBA
A
1
56
55
28
30
29
27
2
3
1
3.3V CMOS 18-BIT
UNIVERSAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
CLK
CE
1D
C1
TO 17 OTHER CHANNELS
1
DESCRIPTION:
vanced dual metal CMOS technology. The LVCH16601A combines D-type
latches and D-type flip-flops to allow data flow in transparent, latched and
clocked modes.
OEBA), latched-enable (LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs. The clock can be controlled by the clock-enable (CLKENAB and
CLKENBA) inputs.
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at
a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/
flip-flop on the low-to-high transition of CLKAB. Output enable OEAB is active
low. When OEAB is low, the outputs are active. When OEAB is high, the
outputs are in the high-impedance state. Data flow for B to A is similar to that
of A to B but uses OEBA, LEBA, CLKBA and CLKENBA.
the use of this device as a translator in a mixed 3.3V/5V supply system.
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
The LVCH16601A 18-bit universal bus transceiver is built using ad-
Data flow in each direction is controlled by output-enable (OEAB and
For A-to-B data flow, the device operates in the transparent mode when
All pins can be driven from either 3.3V or 5V devices. This feature allows
The LVCH16601A has been designed with a ±24mA output driver. This
The LVCH16601A has “bus-hold” which retains the inputs’ last state
CE
1D
C1
CLK
INDUSTRIAL TEMPERATURE RANGE
54
IDT74LVCH16601A
B
1
OCTOBER 2008
DSC-4074/5

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IDT74LVCH16601APVG8 Summary of contents

Page 1

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER FEATURES: • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF • 3.3V ± ...

Page 2

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER PIN CONFIGURATION 1 OEAB 2 LEAB GND GND 12 A ...

Page 3

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input LOW Voltage Level ...

Page 4

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER OUTPUT DRIVE CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in the DC ELECTRICAL ...

Page 5

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER SWITCHING CHARACTERISTICS Symbol Parameter t Propagation Delay PLH PHL t Propagation Delay PLH t LEBA to Ax, LEAB to Bx PHL t Propagation Delay PLH ...

Page 6

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 300 300 LZ ...

Page 7

IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER ORDERING INFORMATION LVC Bus-Hold Family Temp. Range CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 XX XXXX Device Type Package PV PVG 601A for ...

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