AN30183A-PR Panasonic Electronic Components, AN30183A-PR Datasheet - Page 10

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AN30183A-PR

Manufacturer Part Number
AN30183A-PR
Description
Low Dropout Controllers - LDO Vout 0.8-2.4 600mA 1Ch DCDC 4Ch LDO I2C
Manufacturer
Panasonic Electronic Components
Datasheet

Specifications of AN30183A-PR

Rohs
yes
Input Voltage Max
5.5 V
Output Voltage
0.8 V to 2.4 V
Output Current
600 mA
Load Regulation
20 mV
Number Of Outputs
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-20
Input Voltage Min
2.5 V
Maximum Power Dissipation
0.348 W
Minimum Operating Temperature
- 30 C
Notes)
APPLICATION INFORMATION (Continued)
V
T
I
I
REFERENCE VALUES FOR DESIGN
a
2
2
VBAT
C bus (Internal I/O stage characteristics)
C bus (Bus line specifications)
= 25 °C ± 2 °C unless otherwise noted.
Hysteresis of Schmitt trigger
input 1
Hysteresis of Schmitt trigger
input 2
Output fall time from V
Pulse width of spikes which must
be suppressed by the input filter
Capacitance for each I/O pin
Hold time
(repeated) START condition
Low period of the SCL clock
High period of the SCL clock
Set-up time for a repeat START
condition
Data hold time
Data set-up time
Rise time of both SDA
and SCL signals
Fall time of both SDA
and SCL signals
Set-up time of STOP condition
Bus free time between STOP
and START condition
(DDVBAT1 = VB = VIN2) = 3.1V to 4.5V, DVDD = 1.85V , DC-DC : Co = 4.7 µF, Lo = 1 µH / LDO : Co =1.0 µF
*2 :Checked by design, not production tested.
Parameter
IHmin
to V
ILmax
Symbol
Vhys1
Vhys2
t
t
t
t
t
HD:DAT
HD:STA
SU:STA
SU:DAT
SU:STO
t
t
Tsp
t
Tof
HIGH
LOW
BUF
Ci
t
t
r
f
V
Hysteresis 1 of SDA, SCL
V
Hysteresis 2 of SDA, SCL
Bus capacitance : 10 pF to
400 pF
I
I
The first clock pulse is
generated after t
P
P
IO
IO
≤ 6 mA (V
: Max. sink current
10
> 2 V,
< 2 V,
Conditions
OLmax
HD:STA.
= 0.6 V)
0.1 × C
0.1 × C
0.1 × C
0.05 ×
V
V
0.1 ×
20 +
20 +
20 +
Min
100
0.6
1.3
0.6
0.6
0.6
1.3
DVDD
DVDD
0
0
Reference values
AN30183A
b
b
b
Typ
Max
250
300
300
0.9
50
10
Unit
pF
ns
ns
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
V
V
Ver. AEB
Notes
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2
*2

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