FM1608-120-STR Cypress Semiconductor, FM1608-120-STR Datasheet
FM1608-120-STR
Specifications of FM1608-120-STR
Related parts for FM1608-120-STR
FM1608-120-STR Summary of contents
Page 1
... SRAM. Its fast write and high write endurance make it superior to other types of nonvolatile memory. In-system operation of the FM1608 is very similar to other RAM based devices. Minimum read- and write- cycle times are equal. The F-RAM memory, however, is nonvolatile due to its unique ferroelectric memory process ...
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... Address changes that occur after /CE goes low will be ignored until the next falling edge occurs. /OE Input Output Enable: Asserting /OE low causes the FM1608 to drive the data bus when valid data is available. Deasserting /OE high causes the DQ pins to be tri-stated. /WE Input Write Enable: Asserting /WE low causes the FM1608 to write the contents of the data bus to the address location latched by the falling edge of /CE ...
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... In a /CE-controlled write, the /WE signal is asserted prior to beginning the memory cycle. That is, /WE is low when /CE falls. In this case, the part begins the memory cycle as a write. The FM1608 will not drive the data bus regardless of the state of /OE /WE-controlled write, the memory cycle begins on the falling edge of /CE ...
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... The memory architecture is based on an array of rows and columns. Each read or write access causes an endurance cycle for an entire row. In the FM1608, a row is 32 bits wide. Every 4-byte boundary marks the beginning of a new row. Endurance can be optimized by ensuring frequently accessed data is This product conforms to specifications per the terms of the Ramtron standard warranty. The product has completed Ramtron’ ...
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... MCU/MPU pin tri-states during the reset condition. The pullup resistor value should be chosen to ensure the /CE pin tracks V enough value that the current drawn when /CE is low is not an issue. level. DD MCU/ MPU DD Figure 3. Use of Pullup Resistor on /CE FM1608 yet a high FM1608 A(12: ...
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... Rev. 3.4 Nov. 2010 Description SS SS (JEDEC Std JESD22-A114-B) (JEDEC Std JESD22-A115-A) = 4.5V to 5.5V unless otherwise specified) DD Min Typ 4.5 5.0 2.0 -0.3 = -2.0 mA) 2.4 = -4.2 mA Min Units 45 Years FM1608 Ratings -1.0V to +7.0V -1.0V to +7.0V and V < V +1. -55° 125°C 300° C 4kV 300V 1 MSL-1 (-SG) 2 MSL-2 (-SG) Max Units Notes 5 ...
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... DD Min 120 120 180 4.5V to 5.5V unless otherwise specified) DD Min Max 1 (min FM1608 Max Units Notes 120 ns 2,000 Max Units Notes 2,000 ...
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... Input Capacitance IN AC Test Conditions Input Pulse Levels Input rise and fall times Input and output timing levels Read Cycle Timing /CE-Controlled Write Cycle Timing Rev. 3.4 Nov. 2010 = 5V) DD Max Units Equivalent AC Load Circuit 1.5V FM1608 Notes ...
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... (min) IH (min) IH (min Rev. 3.4 Nov. 2010 DD (min) DD (min) DD (min (min) IH (min) IH (min) FM1608 (min) DD (min) DD (min (max) IL (max) IL (max ...
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... Pin 1 17.90 ±0.20 1.27 typ 0.33 0.51 SOIC Package Marking Scheme Legend: RAMTRON XXXXXXX-S-P RYYWWLLLLLLL Example: FM1608, 120ns speed, “Green”/RoHS SOIC package, Rev. 3.4 Nov. 2010 7.50 ±0.10 10.30 ±0.30 2.35 2.65 0.10 0.30 XXXX= part number, S=speed (-120), P= package type (-PG, -SG) R=rev code, YY=year, WW=work week, LLLLLL= lot code M die rev ...
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... BSC 0.005 min. DIP Package Marking Scheme Legend: RAMTRON XXXXXXX-S-P RYYWWLLLLLLL Example: FM1608, 120ns speed, “Green”/RoHS DIP package, Rev. 3.4 Nov. 2010 1.380 1.565 0.014 0.022 XXXX= part number, S=speed (-120), P= package type (-PG, -SG) R=rev code, YY=year, WW=work week, LLLLLL= lot code M rev ...
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... Designs. Extended data retention to 45 years. Added ESD and MSL ratings. Added recommendation on CE pin during power cycles. 3.2 5/30/2007 Redraw package outlines, added marking scheme. 3.3 12/18/2007 Updated MSL ratings. 3.4 11/22/2010 Not Recommended for New Designs. Alternative devices: FM1608B, FM16W08. Rev. 3.4 Nov. 2010 FM1608 ...