74LVTH16501MTDX Fairchild Semiconductor, 74LVTH16501MTDX Datasheet - Page 2

• Manufacturer Part Number: 74LVTH16501MTDX
• Description: TXRX 18BIT UNIV BUS 3ST 56TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74LVTHr

Specifications of 74LVTH16501MTDX

• Logic Type: Universal Bus Transceiver
• Number Of Circuits: 18-Bit
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Connection Diagram
Functional Description
For A-to-B data flow, the device operates in the transparent
mode when LEAB is HIGH. When LEAB is LOW, the A
data is latched if CLKAB is held at a HIGH or LOW logic
level. If LEAB is LOW, the A bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB. Output-
enable OEAB is active-HIGH. When OEAB is HIGH, the
Logic Diagram
2
Pin Descriptions
Function Table
H
X
Note 1: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,
LEBA, and CLKBA. OEBA is active LOW
Note 2: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Note 3: Output level before the indicated steady-state input conditions
were established.
outputs are active. When OEAB is LOW, the outputs are in
the high-impedance state.
Data flow for B to A is similar to that of A-to-B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active-HIGH and OEBA is active-
LOW).
A
B
CLKAB, CLKBA Clock Pulse Inputs
LEAB, LEBA
OEAB, OEBA
1
1
OEAB
LOW-to-HIGH Clock Transition
HIGH Voltage Level
Immaterial
Pin Names
–A
–B
H
H
H
H
H
H
L
18
18
LEAB
X
H
H
L
L
L
L
Data Register A Inputs/3-STATE Outputs
Data Register B Inputs/3-STATE Outputs
Latch Enable Inputs
Output Enable Inputs
Inputs
CLKAB
(Note 1)
L
Z
X
X
X
H
L
LOW Voltage Level
High Impedance
Description
A
X
H
H
X
X
L
L
n
B
B
0
0
Output
(Note 2)
(Note 3)
B
H
H
Z
L
L
n