L4984D STMicroelectronics, L4984D Datasheet - Page 23

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L4984D

Manufacturer Part Number
L4984D
Description
Power Factor Correction ICs Current Mode PFC CCM Line Modulated Bi
Manufacturer
STMicroelectronics
Datasheet

Specifications of L4984D

Rohs
yes

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L4984
8
Voltage feedforward
The power stage gain of PFC pre-regulators varies with the square of the RMS input
voltage. So does the crossover frequency fc of the overall open-loop gain because the gain
has a single pole characteristic. This leads to large trade-offs in the design.
For example, setting the gain of the error amplifier to get fc = 20 Hz at 264 V
fc = 4 Hz at 88 V
loop causes large transient current flow during rapid line or load changes that are limited by
the dynamics of the multiplier output. This limit is considered when selecting the sense
resistor to let the full load power pass under minimum line voltage conditions, with some
margin. But a fixed current limit allows excessive power input at high line, whereas a fixed
power limit requires the current limit to vary inversely with the line voltage.
Input voltage feedforward compensates for the gain variation with the line voltage and allows
all of the above-mentioned issues to be minimized. It consists of deriving a voltage
proportional to the input RMS voltage, feeding this voltage into a squarer/divider circuit
(1/V2 corrector) and providing the resulting signal to the multiplier that generates the current
reference for the inner current control loop (see
Figure 31. Voltage feedforward: squarer-divider (1/V2) block diagram and transfer
In this way, if the line voltage doubles the amplitude of the multiplier, output is halved and
vice versa, so that the current reference is adapted to the new operating conditions with
(ideally) no need to invoke the slow response of the error amplifier. Additionally, the loop
gain is constant throughout the input voltage range, which improves significantly dynamic
behavior at low line and simplifies loop design.
Actually, deriving a voltage proportional to the RMS line voltage implies a form of integration,
which has its own time constant. If it is too small, the voltage generated is affected by a
considerable amount of ripple at twice the mains frequency that causes distortion of the
current reference (resulting in high THD and poor PF); if it is too large there is a
considerable delay in setting the right amount of feedforward, resulting in excessive
overshoot and undershoot of the pre-regulator output voltage in response to large line
voltage changes. Clearly, a trade-off is required.
The L4984 realizes a new voltage feedforward that, using just two external parts, strongly
minimizes this time constant trade-off issue whichever voltage change occurs on the mains,
reference
current
(Vcsx)
MAINS DROP
DETECTOR
MULTIPLIER
characteristic
E/A output
(V
COMP
1/V
ac
C
VFF
FF
, resulting in a sluggish control dynamics. Additionally, the slow control
)
2
5
"ideal" diode
L4984
R
FF
+
-
9.5V
Doc ID 023489 Rev 3
3
MULT
Rectified mains
Figure 31
Vcsx
1.5
0.5
2
1
0
0
0.8
).
1
V
FF
=V
MULT
2
Voltage feedforward
V
COMP
Actual
Ideal
=4V
ac
means having
3
AM13248v1
23/35
4

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