25AA640-I/SN Microchip Technology, 25AA640-I/SN Datasheet - Page 11

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25AA640-I/SN

Manufacturer Part Number
25AA640-I/SN
Description
IC EEPROM 64KBIT 1MHZ 8SOIC
Manufacturer
Microchip Technology
Datasheet

Specifications of 25AA640-I/SN

Memory Size
64K (8K x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
1MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Memory Configuration
8K X 8
Ic Interface Type
SPI
Clock Frequency
1MHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
25AA640-I/SNG
25AA640-I/SNG

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Part Number
Manufacturer
Quantity
Price
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MICROCHIP
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3.6
The Write Status Register instruction (WRSR) allows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the STATUS
register. The array is divided up into four segments.
The user has the ability to write-protect none, one, two,
or all four of the segments of the array. The partitioning
is controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
(WPEN) bit in the STATUS register control the pro-
grammable hardware write-protect feature. Hardware
write protection is enabled when the WP pin is low and
the WPEN bit is high. Hardware write protection is dis-
abled when either the WP pin is high or the WPEN bit
is low. When the chip is hardware write-protected, only
writes to nonvolatile bits in the STATUS register are dis-
abled. See Table 3-3 for a matrix of functionality on the
WPEN bit.
See Figure 3-7 for WRSR timing sequence.
FIGURE 3-7:
© 2008 Microchip Technology Inc.
SCK
SO
CS
SI
Write Status Register Instruction
(WRSR)
0
0
0
WRITE STATUS REGISTER TIMING SEQUENCE
1
0
2
Instruction
0
3
0
4
0
5
High-Impedance
0
6
1
7
TABLE 3-2:
7
8
BP1
6
0
0
1
1
25AA640/25LC640
9
Data to STATUS Register
10
5
11
4
ARRAY PROTECTION
BP0
0
1
0
1
12
3
13
2
Array Addresses
Write-Protected
(1800h-1FFFh)
(1000h-1FFFh)
(0000h-1FFFh)
14
1
upper 1/4
upper 1/2
DS21223H-page 11
none
all
15
0

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