MC10XS3412DHFK Freescale Semiconductor, MC10XS3412DHFK Datasheet - Page 36

• Manufacturer Part Number: MC10XS3412DHFK
• Description: Power Switch ICs - Power Distribution Eswitch Gen3 1012
• Manufacturer: Freescale Semiconductor

Specifications of MC10XS3412DHFK

• Rohs: yes
• Number Of Outputs: 4
• Operating Supply Voltage: 6 V to 20 V
• Supply Current (max): 20 mA
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PQFN-24
• Minimum Operating Temperature: - 40 C

curve and D[5:4] bits inrush curve for selected output, as
shown
36
10XS3412
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 16. Cooling Curve Selection
I
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I
Table 17. Inrush Curve Selection
Figure 13. Overcurrent profile depending on Xenon bit
I
I
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I
OCH
OCH2
OC1
OC2
OC3
OC4
OCLO4
OCLO3
OCLO2
OCLO1
OCH
OCH2
OC1
OC2
OCLO4
OCLO3
OCLO2
OCLO1
Xenon bit set to logic [0]:
Xenon bit set to logic [1]:
D[7:6] bits allow to MCU to programmable bulb cooling
BC1_s (D7)
OC1_s (D5)
1
1
Table 16
t
t
OC1
OC1
0
0
1
1
t
t
0
0
1
1
OC2
OC2
t
t
OC3
OC3
and
t
t
OC4
OC4
Table
BC0_s (D6)
t
OC0_s (D4)
t
OC5
OC5
17.
0
1
0
1
0
1
0
1
t
t
OC6
OC6
Profile Curves Speed
Profile Curves Speed
t
t
OC7
medium (default)
OC7
slow (default)
medium
very slow
medium
slow
fast
fast
Time
Time
replaced by OCHI2 during t
current levels in steady state, as defined in
mode, as described
ADDRESS 00101 — GLOBAL CONFIGURATION
REGISTER (GCR)
through the SPI.
detector. A logic [1] on VDD_FAIL_en bit allows transitioning
to Fail-safe mode for V
module. A logic [1] on PWM_en bit allows control of the
outputs HS[0:3] with PWMR register (the direct input states
are ignored).
reference by PWM module, as described in the following
Table
Table 19. Overcurrent Mode Selection
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OCH
OCH2
OC1
OC2
OC3
OC4
OCLO4
OCLO3
OCLO2
OCLO1
Table 18. Output Steady State Selection
Figure 14. Overcurrent profile with OCHI bit set to ‘1’
OC_mode_s (D0)
OCLO1 (D2) OCLO0 (D1)
A logic [1] on bit D3 (OCHI_s bit) the OCHI1 level is
The wire harness is protected by one of four possible
Bit D0 (OC_mode_sel) allows to select the overcurrent
The GCR register allows the MCU to configure the device
Bit D8 allows the MCU to enable or disable the V
Bit D7 allows the MCU to enable or disable the PWM
Bit D6 (CLOCK_sel) allows to select the clock used as
1
20.
t
OC1
0
0
1
1
t
OC2
0
1
t
OC3
t
OC4
0
1
0
1
Table
only inrush current management (default)
Analog Integrated Circuit Device Data
DD
t
OC5
inrush current and bulb cooling
< V
19.
OC1
DD(FAIL).
, as shown
t
Overcurrent Mode
OC6
Steady State Current
management
Freescale Semiconductor
OCLO2 (default)
OCLO3
OCLO4
OCLO1
t
OC7
Figure
Table
14.
18.
Time
DD
failure