AT24C1024B-PU Atmel, AT24C1024B-PU Datasheet - Page 8

• Manufacturer Part Number: AT24C1024B-PU
• Description: IC EEPROM 1MBIT 1MHZ 8DIP
• Manufacturer: Atmel

Specifications of AT24C1024B-PU

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 1M (128K x 8)
• Speed: 400kHz, 1MHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Organization: 128 K x 8
• Interface Type: 2-Wire
• Maximum Clock Frequency: 400 KHz
• Access Time: 900 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V, 3.3 V
• Memory Configuration: 131072 X 8
• Clock Frequency: 1MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: DIP
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 4-5.
Figure 4-6.
5. Device Addressing
8
AT24C1024B
Start and Stop Definition
Output Acknowledge
DATA OUT
DATA IN
The 1024K EEPROM requires an 8-bit device address word following a start condition to enable
the chip for a read or write operation (see
sists of a mandatory one, zero sequence for the first four most significant bits as shown. This is
common to all two-wire EEPROM devices.
The 1024K uses the two device address bit, A1, A2, to allow up to four devices on the same bus.
These A1, A2 bits must compare to the corresponding hardwired input pins. The A1, A2 pin uses
an internal proprietary circuit that biases it to a logic low condition if the pin is allowed to float.
The seventh bit (P
address bit is the most significant bit of the data word address that follows. The eighth bit of the
device address is the read/write operation select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not
made, the device will return to a standby state.
SDA
SCL
SCL
START
START
0
) of the device address is a memory page address bit. This memory page
1
Figure 7-1 on page
8
ACKNOWLEDGE
STOP
9
11). The device address word con-
5194F–SEEPR–1/08