MCIMX6U5EVM10AB Freescale Semiconductor, MCIMX6U5EVM10AB Datasheet - Page 20

• Manufacturer Part Number: MCIMX6U5EVM10AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6U5EVM10AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 20 C
• Number Of Timers: 2

Modules List
20
NVCC_LVDS2P5
DRAM_VREF
TEST_MODE
Signal Name
PCIE_REXT
JTAG_ nnnn
GPANAIO
VDD_FA
FA_ANA
POR_B
ONOFF
ZQPAD
NC
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
NVCC_DRAM supply. The user must tie DDR_VREF to a precision external resistor divider. Use a
1 kΩ 0.5% resistor to GND and a 1 kΩ 0.5% resistor to NVCC_DRAM. Shunt each resistor with a
closely-mounted 0.1 µF capacitor.
To reduce supply current, a pair of 1.5 kΩ 0.1% resistors can be used. Using resistors with
recommended tolerances ensures the ± 2% DDR_VREF tolerance (per the DDR3 specification) is
maintained when four DDR3 ICs plus the i.MX 6Solo/6DualLite are drawing current on the resistor
divider.
It is recommended to use regulated power supply for “big” memory configurations (more that eight
devices)
DRAM calibration resistor 240 Ω 1% used as reference during DRAM output buffer driver
calibration should be connected between this pad and GND.
shorted to VDDHIGH_CAP on the circuit board.
These signals are reserved for Freescale manufacturing use only. User must tie both connections
to GND.
floating.
The JTAG interface is summarized in
if external resistors are used, the user must ensure that the on-chip pull-up/down configuration is
followed. For example, do not use an external pull down on an input that has on-chip pull-up.
JTAG_TDO is configured with a keeper circuit such that the floating condition is eliminated if an
external pull resistor is not present. An external pull resistor on JTAG_TDO is detrimental and
should be avoided.
JTAG_MOD is referenced as SJC_MOD in the i.MX 6Solo/6DualLite reference manual. Both
names refer to the same signal. JTAG_MOD must be externally connected to GND for normal
operation. Termination to GND through an external pull-down resistor (such as 1 kΩ) is allowed.
JTAG_MOD set to hi configures the JTAG interface to mode compliant with IEEE1149.1 standard.
JTAG_MOD set to low configures the JTAG interface for common SW debug adding all the system
TAPs to the chain.
These signals are No Connect (NC) and should be floated by the user.
This cold reset negative logic input resets all modules and logic in the IC.
May be used in addition to internally generated power on reset signal (logical AND, both internal
and external signals are considered active low).
In normal mode may be connected to ON/OFF button (De-bouncing provided at this input).
Internally this pad is pulled up. Short connection to GND in OFF mode causes internal power
management state machine to change state to ON. In ON mode short connection to GND
generates interrupt (intended to SW controllable power down). Long above ~5s connection to GND
causes “forced” OFF.
TEST_MODE is for Freescale factory use. This signal is internally connected to an on-chip
pull-down device. The user must either float this signal or tie it to GND.
resistor on PCIE_REXT pad to ground.
When using DDR_VREF with DDR I/O, the nominal reference voltage must be half of the
The DDR pre-drivers share the NVCC_LVDS2P5 ball with the LVDS interface. This ball can be
This signal is reserved for Freescale manufacturing use only. User must leave this connection
The impedance calibration process requires connection of reference resistor 200 Ω 1% precision
Table 3. Special Signal Considerations (continued)
Table
4. Use of external resistors is unnecessary. However,
Remarks
Freescale Semiconductor