11AA010T-I/TT Microchip Technology, 11AA010T-I/TT Datasheet - Page 8

• Manufacturer Part Number: 11AA010T-I/TT
• Description: IC EEPROM 1KBIT 100KHZ SOT23-3
• Manufacturer: Microchip Technology

Specifications of 11AA010T-I/TT

• Memory Size: 1K (128 x 8)
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 100kHz
• Interface: UNI/O™ (Single Wire)
• Voltage - Supply: 1.8 V ~ 5.5 V
• Organization: 128 x 8
• Interface Type: Serial
• Maximum Clock Frequency: 100 KHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 50 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 11AA010T-I/TTTR

11AAXXX/11LCXXX
3.3
An Acknowledge routine occurs after each byte is
transmitted, including the start header. This routine
consists of two bits. The first bit is transmitted by the
master, and the second bit is transmitted by the slave.
The Master Acknowledge, or MAK, is signified by trans-
mitting a ‘
operation is to be continued. Conversely, a Not
Acknowledge, or NoMAK, is signified by transmitting a
‘0’, and is used to end the current operation (and initiate
the write cycle for write operations).
The slave Acknowledge, or SAK, is also signified by
transmitting a ‘
However, unlike the NoMAK, the NoSAK is signified by
the lack of a middle edge during the bit period.
A NoSAK will occur for the following events:
• Following the start header
• Following the device address, if no slave on the
• Following the command byte, if the command is
• If the slave becomes out of sync with the master
• If a command is terminated prematurely by using
See Figure 3.3 and Figure 3-4 for details.
If a NoSAK is received from the slave after any byte
(except the start header), an error has occurred. The
master should then perform a standby pulse and begin
the desired command again.
FIGURE 3-3:
DS22067H-page 8
Note: A MAK must always be transmitted
Note: When a NoMAK is used to end a
Note: In order to guard against bus contention,
bus matches the transmitted address
invalid, including Read, CRRD, Write, WRSR,
SETAL, and ERAL during a write cycle.
a NoMAK, with the exception of immediately after
the device address.
Acknowledge
following the start header.
or
not initiated if no bytes of data have
been received.
a NoSAK will occur after the start
header.
1
’, and informs the slave that the current
WRSR
Master
MAK
1
’, and confirms proper communication.
instruction, the write cycle is
ACKNOWLEDGE
ROUTINE
Slave
SAK
WRITE
Preliminary
FIGURE 3-4:
3.4
A device address byte is the first byte received from the
master device following the start header. The device
address byte consists of a four-bit family code, for the
11XX this is set as ‘
device address byte are the device code, which is
hardwired to ‘
The device code on 11XXXX1 devices is hardwired to
‘0001’. This allows both 11XXXX0 and 11XXXX1
devices to be used on the same bus without address
conflicts.
FIGURE 3-5:
3.5
To help guard against high current conditions arising
from bus conflicts, the 11XX features a current-limited
output driver. The I
the maximum current that can be sunk or sourced,
respectively, by the SCIO pin. The 11XX will vary the
output driver impedance to ensure that the maximum
current level is not exceeded.
Note 1:
Note 1:
1
NoMAK (‘0’)
MAK (‘1’)
Device Addressing
Bus Conflict Protection
A NoSAK is defined as any sequence that is not a
valid SAK.
0
SLAVE ADDRESS
This bit is a ‘1’ on the 11XXXX1.
0000
1
OL
’ on the 11XXXX0 devices.
1010
0
ACKNOWLEDGE BITS
DEVICE ADDRESS BYTE
ALLOCATION
and I
 2010 Microchip Technology Inc.
’. The last four bits of the
0
OH
specifications describe
0
NoSAK
SAK (‘1’)
0
MAK
(1)
0
(1)
SAK