MAX16005AUE+ Maxim Integrated, MAX16005AUE+ Datasheet - Page 10

• Manufacturer Part Number: MAX16005AUE+
• Description: Supervisory Circuits LLow-Voltage Quad-/Hex-/Octal-Voltage P Supervisors in TQFN
• Manufacturer: Maxim Integrated
• Series: MAX16000, MAX16001, MAX16002, MAX16003, MAX16004, MAX16005, MAX16006, MAX16007r

Specifications of MAX16005AUE+

• Number Of Voltages Monitored: 6
• Monitored Voltage: 1.8 V, 2.5 V, 3.3 V, Adjustable
• Undervoltage Threshold: 2.97 V, 2.25 V, 1.62 V, Adjustable
• Overvoltage Threshold: 1.71 V, 2.375 V, 3.135 V, Adjustable
• Output Type: Active Low, Open Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 280 ms
• Supply Voltage - Max: 5.5 V
• Chip Enable Signals: No
• Maximum Power Dissipation: 1349 mW
• Power Fail Detection: No
• Supply Current (typ): 50 uA
• Supply Voltage - Min: 1 V

Low-Voltage, Quad-/Hex-/Octal-Voltage
µP Supervisors
MAX16000–MAX16007
10
10
11
12
13
1
2
3
4
5
6
7
8
9
PIN
10
11
—
—
—
—
1
2
3
4
5
6
7
NAME
OUT5
OUT6
OUT7
OUT8
GND
WDI
V
SRT
IN5
IN6
IN7
IN8
MR
CC
Monitored Input Voltage 5. See Table 1 for the input voltage threshold.
Monitored Input Voltage 6. See Table 1 for the input voltage threshold.
Monitored Input Voltage 7. See Table 1 for the input voltage threshold.
Monitored Input Voltage 8. See Table 1 for the input voltage threshold.
Watchdog Timer Input. If WDI remains low or high for longer than the watchdog timeout period,
RESET is asserted and the timer is cleared. The timer also clears whenever a reset is asserted or a
rising or falling edge on WDI is detected. The watchdog timer enters a startup period that allows 54s
for the first transition to occur before a reset. Leave WDI unconnected to disable the watchdog timer.
The WDI open-state detector uses a small 400nA current. Therefore, do not connect WDI to anything
that will source or sink more than 200nA. Note that the leakage current specification for most three-
state drivers exceeds 200nA.
Ground
Unmonitored Power-Supply Input
Output 5. When the voltage at IN5 falls below its threshold, OUT5 goes low and stays low until the
voltage at IN5 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 6. When the voltage at IN6 falls below its threshold, OUT6 goes low and stays low until the
voltage at IN6 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 7. When the voltage at IN7 falls below its threshold, OUT7 goes low and stays low until the
voltage at IN7 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Output 8. When the voltage at IN8 falls below its threshold, OUT8 goes low and stays low until the
voltage at IN8 exceeds its threshold. The open-drain output has a 30µA internal pullup to V
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset
timeout period after MR is deasserted. MR is pulled up to V
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The
reset timeout period can be calculated as follows:
Reset Timeout (s) = 2.06 x 10
SRT to V
CC
.
6
Pin Description (MAX16006/MAX16007)
(Ω) x C
SRT
(F). For the internal timeout period of 140ms (min), connect
FUNCTION
CC
through a 20kΩ resistor.
Maxim Integrated
CC
CC
CC
CC
.
.
.
.