CY7C1370D-167AXI Cypress Semiconductor Corp, CY7C1370D-167AXI Datasheet - Page 23

• Manufacturer Part Number: CY7C1370D-167AXI
• Description: IC SRAM 18MBIT 167MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Synchronousr

Specifications of CY7C1370D-167AXI

• Memory Size: 18M (512K x 36)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 167MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 3.4 ns
• Maximum Clock Frequency: 167 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 275 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 3.3 V
• Density: 18Mb
• Access Time (max): 3.4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 167MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 19b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Supply Current: 275mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2136; CY7C1370D-167AXI

Switching Waveforms
Notes
Document Number: 38-05555 Rev. *K
28. The Ignore Clock Edge or Stall cycle (Clock 3) illustrated CEN being used to create a pause. A write is not performed during this cycle.
29. Device must be deselected when entering ZZ mode. See cycle description table for all possible signal conditions to deselect the device.
30. I/Os are in High-Z when exiting ZZ sleep mode.
In-Out (DQ)
ADDRESS
ADV/LD
BWx
Data
CEN
CLK
WE
CE
A LL INPUTS
(except ZZ)
Outputs (Q)
WRITE
D(A1)
I
1
A1
SUPPLY
CLK
ZZ
Q(A2)
READ
A2
2
(continued)
Figure 6. NOP,STALL, and DESELECT Cycles
t
ZZI
STALL
t ZZ
I DDZZ
3
Figure 7. ZZ Mode Timing
D(A1)
Q(A3)
READ
A3
4
Q(A2)
WRITE
D(A4)
DON’T CARE
DON’T CARE
A4
5
High-Z
STALL
6
[29, 30]
Q(A3)
UNDEFINED
[25, 26, 28]
NOP
7
DESELECT or READ Only
CY7C1370D, CY7C1372D
t RZZI
t ZZREC
Q(A5)
D(A4)
READ
A5
8
DESELECT
9
CONTINUE
DESELECT
Page 23 of 29
Q(A5)
10
t
CHZ
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