BR93L66RF-WE2 Rohm Semiconductor, BR93L66RF-WE2 Datasheet - Page 13

• Manufacturer Part Number: BR93L66RF-WE2
• Description: IC EEPROM 4KBIT 2MHZ 8SOP
• Manufacturer: Rohm Semiconductor

Specifications of BR93L66RF-WE2

• Memory Size: 4K (256 x 16)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 2MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Clock Frequency: 2MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Memory Configuration: 256 X 16
• Interface Type: Serial, Microwire
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6) When to directly connect DI and DO
This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,
meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1
control line.
Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input
Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the
same time in the following points.
Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted.
Note) As for the case (2), attention must be paid to the following.
(1) 1 clock cycle to take in A0 address data at read command
(1) Timing of CS = "H" after write command. DO terminal in READY / BUSY function output.
When status READY is output, DO and DO are shared, DI = "H" and the microcontroller DI/O = "High-Z" or the microcontroller
DI/O = "H", if SK clock is input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a
method to avoid malfunction, at status READY output, set SK = "L", or start CS within 4 clocks after "H" of READY signal is
output.
Dummy bit "0" is output to DO terminal.
→When address data A0 = "1" input, through current route occurs.
When the next start bit input is recognized, "HIGH-Z" gets in.
→Especially, at command input after write, when CS input is started with microcontroller DI/O output "L",
READY output "H" is output from DO terminal, and through current route occurs.
Fig. 56 Collision timing at read data output at DI, DO direct connection
EEPROM CS input
EEPROM SK input
EEPROM DI input
EEPROM DO output
Microcontroller DI/O port
EEPROM CS input
EEPROM SK input
EEPROM DI input
EEPROM DO output
Microcontroller DI/O port
Fig. 57 Collision timing at DI, DO direct connection
Fig. 55 DI, DO control line common connection
Fig. 58 Start bit input timing at DI, DO direct connection
Microcontroller
Microcontroller output
Microcontroller output
CS
SK
DI
DO
Write command
Write command
Write command
Write command
Write command
High-Z
"H"
DI / O PORT
READY
A1
A1
Microcontroller input
BUSY
BUSY
R
13/16
A0
A0
READY
READY
0
DI
DO
Start bit
D15
Microcontroller input
Collision of DI input and DO output
EEPROM
High-Z
Microcontroller output
D14
READY
Collision of DI input and DO output
D13
High-Z
Because DI = "H", set
SK = "L" at CS rise.
High-Z