MT48LC16M8A2P-75:G Micron Technology Inc, MT48LC16M8A2P-75:G Datasheet - Page 57

IC SDRAM 128MBIT 133MHZ 54TSOP

MT48LC16M8A2P-75:G

Manufacturer Part Number
MT48LC16M8A2P-75:G
Description
IC SDRAM 128MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC16M8A2P-75:G

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (16M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Organization
16Mx8
Density
128Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT48LC16M8A2P-75:G
Manufacturer:
ST
Quantity:
2 000
Figure 41:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
COMMAND
A0–A9, A11
BA0, BA1
CLK
CKE
A10
DQ
High-Z
Precharge all
t CKS
active banks
t CMS
Self Refresh Mode
t
SINGLE BANK
AS
PRECHARGE
ALL BANKS
BANK(S)
T0
Notes:
t CKH
t CMH
t
AH
t CK
1. No maximum time limit for self refresh.
2.
3. Self refresh mode not supported on automotive temperature (AT) devices.
t RP
t
XSR requires minimum of 2 clocks regardless of frequency or timing.
T1
NOP
t CH
Enter self refresh mode
t CKS
t CL
REFRESH
AUTO
CLK stable prior to exiting
T2
self refresh mode
t RAS min
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1
(Restart refresh time base)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
Exit self refresh mode
RAS MAX applies to non-self refresh mode.
Tn + 1
NOP
t XSR
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128Mb: x4, x8, x16 SDRAM
or COMMAND
INHIBIT
To + 1
©1999 Micron Technology, Inc. All rights reserved.
Timing Diagrams
To + 2
REFRESH
AUTO
DON’T CARE

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