DS2502+T&R Maxim Integrated Products, DS2502+T&R Datasheet - Page 3

• Manufacturer Part Number: DS2502+T&R
• Description: IC OTP 1KBIT TO92-3
• Manufacturer: Maxim Integrated Products

Specifications of DS2502+T&R

• Format - Memory: EPROMs
• Memory Type: OTP EPROM
• Memory Size: 1K (1K x 1)
• Interface: 1-Wire Serial
• Operating Temperature: -40°C ~ 85°C
• Package / Case: TO-92-3 (Standard Body), TO-226
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Speed: -

the 1-Wire line as well as indicate to the bus master how many and what types of devices are present. The
protocol required for these ROM Function Commands is described in Figure 9. After a ROM Function
Command is successfully executed, the memory functions that operate on the EPROM portions of the
DS2502 become accessible and the bus master may issue any one of the five Memory Function
Commands specific to the DS2502 to read or program the various data fields. The protocol for these
Memory Function Commands is described in Figure 5. All data is read and written least significant bit
first.
64-BIT LASERED ROM
Each DS2502 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code.
The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. (See Figure 3).
The 64-bit ROM and ROM Function Control section allow the DS2502 to operate as a 1-Wire device and
follow the 1-Wire protocol detailed in the section “1-Wire Bus System.” The memory functions required
to read and program the EPROM sections of the DS2502 are not accessible until the ROM function
protocol has been satisfied. This protocol is described in the ROM functions flow chart (Figure 9). The 1-
Wire bus master must first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM,
3) Search ROM, or 4) Skip ROM. After a ROM function sequence has been successfully executed, the
bus master may then provide any one of the memory function commands specific to the DS2502 (Figure
6).
The 1-Wire CRC of the lasered ROM is generated using the polynomial X
shows a hardware implementation of this CRC generator. Additional information about the Dallas
Semiconductor 1-Wire Cyclic Redundancy Check is available in Application Note 27. The shift register
acting as the CRC accumulator is initialized to 0. Then starting with the least significant bit of the family
code, 1 bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial
number is entered. After the 48
CRC value. Shifting in the 8 bits of CRC should return the shift register to all 0s.
DS2502 BLOCK DIAGRAM Figure 1
1-WIRE BUS
th
PROGRAM
VOLTAGE
DETECT
bit of the serial number has been entered, the shift register contains the
DATA
(4 PAGES OF 32 BYTES)
1-WIRE FUNCTION
STATUS BYTES
3 of 23
GENERATOR
1024-BIT EPROM
8-BIT CRC
FUNCTION
CONTROL
MEMORY
CONTROL
EPROM
PARASITE POWER
64-BIT LASERED
SCRATCHPAD
8
ROM
8-BIT
+ X
5
+ X
4
+ 1. Figure 4