AT24C256N-10SI-2.7 Atmel, AT24C256N-10SI-2.7 Datasheet - Page 3

IC EEPROM 256KBIT 1MHZ 8SOIC

AT24C256N-10SI-2.7

Manufacturer Part Number
AT24C256N-10SI-2.7
Description
IC EEPROM 256KBIT 1MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT24C256N-10SI-2.7

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
256K (32K x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT24C256N-10SI2.7
AT24C256N10SI2.7

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C256N-10SI-2.7
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
AT24C256N-10SI-2.7
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Pin Description
Memory
Organization
0670T–SEEPR–3/07
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-
drain driven and may be wire-ORed with any number of other open-drain or open collector
devices.
DEVICE/ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs that are hard-
wired or left not connected for hardware compatibility with other AT24CXX devices. When the
pins are hardwired, as many as four 128K/256K devices may be addressed on a single bus
system (device addressing is discussed in detail under the Device Addressing section). If the
pins are left floating, the A1 and A0 pins will be internally pulled down to GND if the capacitive
coupling to the circuit board V
necting the address pins to GND.
WRITE PROTECT (WP): The write protect input, when connected to GND, allows normal write
operations. When WP is connected high to V
ited. If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive
coupling to the circuit board V
necting the pin to GND.
AT24C128/256, 128K/256K SERIAL EEPROM: The 128K/256K is internally organized as
256/512 pages of 64-bytes each. Random word addressing requires a 14/15-bit data word
address.
CC
CC
plane is <3 pF. If coupling is >3 pF, Atmel recommends con-
plane is <3 pF. If coupling is >3 pF, Atmel recommends con-
CC
, all write operations to the memory are inhib-
AT24C128/256
3

Related parts for AT24C256N-10SI-2.7