CY7C1021CV33-15ZC Cypress Semiconductor Corp, CY7C1021CV33-15ZC Datasheet - Page 5
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CY7C1021CV33-15ZC
Manufacturer Part Number
CY7C1021CV33-15ZC
Description
IC SRAM 1MBIT 15NS 44TSOP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1021CV33-10VC.pdf
(12 pages)
Specifications of CY7C1021CV33-15ZC
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
1M (64K x 16)
Speed
15ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-TSOP II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1482
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1021CV33-15ZC
Manufacturer:
CYP
Quantity:
69
Document #: 38-05132 Rev. *C
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
BW
Parameter
5.
6.
7.
8.
9.
[8]
[8]
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
At any given temperature and voltage condition, t
t
This parameter is guaranteed by design and is not tested.
The internal Write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE/BLE LOW. CE, WE and BHE/BLE must be LOW to initiate a Write,
and the transition of these signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write.
HZOE
, t
HZBE
[9]
, t
HZCE
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE LOW to Low-Z
CE HIGH to High-Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable to Data Valid
Byte Enable to Low-Z
Byte Disable to High-Z
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low-Z
WE LOW to High-Z
Byte Enable to End of Write
, and t
HZWE
Description
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
[6]
[6]
Over the Operating Range
[6, 7]
[6]
[6, 7]
[6, 7]
HZCE
is less than t
Min.
1021CV33-8
8
3
0
3
0
0
8
7
7
0
0
6
5
0
3
6
LZCE
, t
[5]
Max.
HZOE
8
8
5
4
4
8
5
4
4
is less than t
1021CV33-10
Min.
10
10
3
0
3
0
0
8
8
0
0
7
5
0
3
7
LZOE
, and t
Max.
10
10
10
5
5
5
5
5
5
HZWE
is less than t
1021CV33-12
Min.
12
12
3
0
3
0
0
9
9
0
0
8
6
0
3
8
LZWE
Max.
12
12
12
6
6
6
6
6
6
for any given device.
CY7C1021CV33
1021CV33-15
Min.
15
15
10
10
10
3
0
3
0
0
0
0
8
0
3
9
Max.
Page 5 of 12
15
15
15
7
7
7
7
7
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns