M45PE80-VMP6 NUMONYX, M45PE80-VMP6 Datasheet
M45PE80-VMP6
Specifications of M45PE80-VMP6
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Related parts for M45PE80-VMP6
M45PE80-VMP6 Summary of contents
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... SPI Bus Compatible Serial Interface 25MHz Clock Rate (maximum) Deep Power-down Mode 1 A (typical) Electronic Signature – JEDEC Standard Two-Byte Signature (4014h) More than 100,000 Write Cycles More than 20 Year Data Retention May 2004 Figure 1. Packages VDFPN8 (MP) 6x5mm (MLP8) SO16 (MF) 300 mil width M45PE80 1/36 ...
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... M45PE80 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. VDFPN Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 4. SO Connections SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Serial Data Output ( Serial Data Input ( Serial Clock ( Chip Select ( Reset (Reset Write Protect ( SPI MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 5. Bus Master and Memory Devices on the SPI Bus Figure 6 ...
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... DC AND AC PARAMETERS Table 8. Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 9. AC Measurement Conditions Figure 21.AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 10. Capacitance Table 11. DC Characteristics Table 12. AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 22.Serial Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 23.Write Protect Setup and Hold Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 24.Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 25.Reset AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 M45PE80 3/36 ...
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... M45PE80 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 26.MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Outline . . . . . . . 32 Table 13. MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Mechanical Data32 Figure 27.SO16 wide – 16-lead Plastic Small Outline, 300 mils body width, Package Outline . . . . 33 Table 14. SO16 wide – ...
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... SUMMARY DESCRIPTION The M45PE80 is a 8Mbit ( bit) Serial Paged Flash Memory accessed by a high speed SPI- compatible bus. The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle fol- lowed by a Page Program cycle ...
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... M45PE80 SIGNAL DESCRIPTION Serial Data Output (Q). This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C). Serial Data Input (D). This input signal is used to transfer data serially into the device. It receives in- structions, addresses, and the data to be pro- grammed ...
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... Stand-by mode and not transferring data: – C remains at 0 for (CPOL=0, CPHA=0) – C remains at 1 for (CPOL=1, CPHA= SPI Memory SPI Memory Device Device M45PE80 SPI Memory Device AI04043B MSB AI01438B 7/36 ...
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... M45PE80 OPERATING FEATURES Sharing the Overhead of Modifying Data To write or program one (or more) data bytes, two instructions are required: Write Enable (WREN), which is one byte, and a Page Write (PW) or Page Program (PP) sequence, which consists of four bytes plus data. This is followed by the internal cy- ...
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... The environments where non-volatile memory de- vices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the M45PE80 boasts the following data protection mechanisms: Power-On Reset and an internal timer (t can provide protection against inadvertant changes while the power supply is outside the operating specification ...
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... M45PE80 MEMORY ORGANIZATION The memory is organized as: 4096 pages (256 bytes each). 1,048,576 bytes (8 bits each) 16 sectors (512 Kbits, 65536 bytes each) Each page can be individually: – programmed (bits are programmed from – erased (bits are erased from – written (bits are changed to either The device is Page or Sector Erasable (bits are erased from ...
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... Figure 7. Block Diagram Reset W Control Logic Address Register and Counter High Voltage Generator I/O Shift Register 256 Byte Data Buffer 10000h 00000h 256 Bytes (Page Size) X Decoder M45PE80 Status Register FFFFFh First 256 Pages can be made read-only 000FFh AI06812 11/36 ...
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... M45PE80 INSTRUCTIONS All instructions, addresses and data are shifted in and out of the device, most significant bit first. Serial Data Input (D) is sampled on the first rising edge of Serial Clock (C) after Chip Select (S) is driven Low. Then, the one-byte instruction code must be shifted in to the device, most significant bit first, on Serial Data Input (D), each bit being latched on the rising edges of Serial Clock (C) ...
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... Chip Select (S) High Instruction High Impedance – Power-up (Figure 9.) – Write Disable (WRDI) instruction completion – Page Write (PW) instruction completion – Page Program (PP) instruction completion – Page Erase (PE) instruction completion – Sector Erase (SE) instruction completion Instruction High Impedance M45PE80 AI02281E AI03750D 13/36 ...
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... M45PE80 Read Identification (RDID) The Read Identification (RDID) instruction allows the 8-bit manufacturer identification to be read, fol- lowed by two bytes of device identification. The manufacturer identification is assigned by JEDEC, and has the value 20h for STMicroelectronics. The device identification is assigned by the device manufacturer, and indicates the memory type in the first byte (40h), and the memory capacity of the device in the second byte (14h) ...
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... Write Enable Latch. When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch 11.. is reset and no Write, Program or Erase instruction is accepted Status Register Out MSB Status Register Out MSB AI02031E M45PE80 15/36 ...
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... M45PE80 Read Data Bytes (READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being latched-in during the rising edge of Serial Clock (C). Then the mem- ...
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... High at any time during data output. Any Read Data Bytes at Higher Speed (FAST_READ) in- struction, while an Erase, Program or Write cycle Figure 13 progress, is rejected without having any ef- fects on the cycle that is in progress BIT ADDRESS DATA OUT MSB Data Bytes at Higher 47 DATA OUT MSB MSB M45PE80 Speed AI04006 17/36 ...
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... M45PE80 Page Write (PW) The Page Write (PW) instruction allows bytes to be written in the memory. Before it can be accept- ed, a Write Enable (WREN) instruction must previ- ously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL). ...
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... Hardware Protected is not executed. Any Page Program (PP) instruction, while an Erase, Program or Write cycle is in progress, is re- jected without having any effects on the cycle that is in progress 24-Bit Address MSB Data Byte MSB Data Byte MSB Data Byte MSB AI04044 M45PE80 ) PP 19/36 ...
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... M45PE80 Page Erase (PE) The Page Erase (PE) instruction sets to 1 (FFh) all bits inside the chosen page. Before it can be ac- cepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL). ...
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... Hardware Protected is not executed. Any Sector Erase (SE) instruction, while an Erase, Program or Write cycle is in progress, is rejected Figure 17.. without having any effects on the cycle that is in progress Instruction 24 Bit Address 23 22 MSB M45PE80 ) is initiated. While the Sector Erase cy AI03751D 21/36 ...
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... M45PE80 Deep Power-down (DP) Executing the Deep Power-down (DP) instruction is the only way to put the device in the lowest con- sumption mode (the Deep Power-down mode). It can also be used as an extra software protection mechanism, while the device is not in active use, since in this mode, the device ignores all Write, Program and Erase instructions ...
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... Any Release from Deep Power-down (RDP) in- struction, while an Erase, Program or Write cycle Figure 19 progress, is rejected without having any ef- fects on the cycle that is in progress RDP Deep Power-down Mode M45PE80 , the device is put in the RDP Stand-by Mode AI06807 23/36 ...
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... M45PE80 POWER-UP AND POWER-DOWN At Power-up and Power-down, the device must not be selected (that is Chip Select (S) must follow the voltage applied until V CC correct value: – V (min) at Power-up, and then for a further CC delay of t VSL – Power-down SS Usually a simple pull-up resistor on Chip Select (S) can be used to insure safe and proper Power-up and Power-down ...
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... Note: 1. These parameters are characterized only, over the temperature range –40°C to +85°C. INITIAL DELIVERY STATE The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). All usable Status Register bits are 0. Threshold WI Parameter M45PE80 Min. Max. Unit 30 µ ...
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... M45PE80 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not im- Table 7 ...
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... Input Levels Timing Reference Levels 0.8V CC 0.2V CC Test Condition OUT =25°C and a frequency of 20 MHz. A Min. Max. 2.7 3.6 –40 85 Min. Max 0. 0. Input and Output 0.7V CC 0.3V CC AI00825B Min. Max M45PE80 Unit V °C Unit Unit pF pF 27/36 ...
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... M45PE80 Table 11. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO Standby Current I CC1 (Standby and Reset modes) I Deep Power-down Current CC2 I Operating Current (FAST_READ) CC3 I Operating Current (PW) CC4 I Operating Current (SE) CC5 V Input Low Voltage IL V Input High Voltage ...
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... Page Erase Cycle Time PE t Sector Erase Cycle Time SE Note must be greater than or equal Value guaranteed by characterization, not 100% tested in production. Table 8. and Parameter Min. D.C. D. 0.03 (peak to peak 200 100 C M45PE80 Table 9. Typ. Max. Unit 25 MHz 20 MHz µs 3 µ ...
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... M45PE80 Figure 22. Serial Input Timing S tCHSL C tDVCH D High Impedance Q Figure 23. Write Protect Setup and Hold Timing W tWHSL High Impedance Q 30/36 tSLCH tCHSH tCHDX tCLCH MSB IN tSHSL tSHCH tCHCL LSB IN AI01447C tSHWL AI07439 ...
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... Figure 24. Output Timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D Figure 25. Reset AC Waveforms S Reset tCH tCLQV tQLQH tQHQL tSHRH tRHSL tRLRH M45PE80 tCL tSHQZ LSB OUT AI01449D AI06808 31/36 ...
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... M45PE80 PACKAGE MECHANICAL Figure 26. MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Outline Note: Drawing is not to scale. Table 13. MLP8, 8-lead Very thin Dual Flat Package No lead, 6x5mm, Package Mechanical Data Symb. Typ 0.65 A3 0.20 b 0.40 D 6.00 D1 5. ...
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... M45PE80 h x 45˚ inches Typ. Min. Max. 0.093 0.104 0.004 0.012 0.013 0.020 0.009 0.013 0.398 0.413 0.291 0.299 0.050 – 0.394 ...
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... Lead-Free, RoHS compliant, Sb Note: 1. Available for SO16 package only 2. Available for MLP package only For a list of available options (speed, package, etc.) or for further information on any aspect of this 34/36 M45PE80 – O -free and TBBA-free 2 3 device, please contact your nearest ST Sales Of- fice ...
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... Change of naming for VDFPN8 package. Document promoted to full datasheet 23-Jan-2004 3.0 SO16 pin-out corrected Soldering temperature information clarified for RoHS compliant devices. Device Grade 28-May-2004 4.0 clarified Description of Revision (min) extended to –0.6V, and t (typ) improved to 1.2ms. Table of contents, SO16 PP M45PE80 35/36 ...
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... M45PE80 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...