AT17F32-30BJU Atmel, AT17F32-30BJU Datasheet - Page 5

IC EEPROM FLASH 32MBIT 44-PLCC

AT17F32-30BJU

Manufacturer Part Number
AT17F32-30BJU
Description
IC EEPROM FLASH 32MBIT 44-PLCC
Manufacturer
Atmel
Datasheet

Specifications of AT17F32-30BJU

Programmable Type
FLASH
Memory Size
32Mb
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LCC (J-Lead)
For Use With
ATDH2225 - CABLE ISP FOR AT17ATDH2200E - CONFIGURATOR PROGRAM BOARD KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT17F32-30BJU
Manufacturer:
Atmel
Quantity:
10 000
5.4
5.5
5.6
5.7
5.8
5.9
3393C–CNFG–6/05
PAGESEL[1:0]
RESET/OE
CE
GND
CEO
A2
(1)
(1)
(1)
(2)
Page select inputs. Used to determine which of the 4 memory pages are targeted during a serial
configuration download. The address space for each of the pages is shown in
SER_EN is Low (ISP mode) these pins have no effect.
Table 5-2.
Output Enable (active High) and RESET (active Low) when SER_EN is High. A Low level on
RESET/OE resets both the address and bit counters. A High level (with CE Low) enables the
data output driver.
Chip Enable input (active Low). A Low level (with OE High) allows CLK to increment the address
counter and enables the data output driver. A High level on CE disables both the address and bit
counters and forces the device into a low-power standby mode. Note that this pin will not
enable/disable the device in the 2-wire Serial Programming mode (SER_EN Low).
Ground pin. A 0.2 µF decoupling capacitor between V
Chip Enable Output (when SER_EN is High). This output goes Low when the internal address
counter has reached its maximum value. If the PAGE_EN input is set High, the maximum value
is the highest address in the selected partition. The PAGESEL[1:0] inputs are used to make the
4 partition selections. If the PAGE_EN input is set Low, the device is not partitioned and the
address maximum value is the highest address in the device, see
daisy chain of AT17F Series devices, the CEO pin of one device must be connected to the CE
input of the next device in the chain. It will stay Low as long as CE is Low and OE is High. It will
then follow CE until OE goes Low; thereafter, CEO will stay High until the entire EEPROM is
read again.
Device selection input, (when SER_EN Low). The input is used to enable (or chip select) the
device during programming (i.e., when SER_EN is Low). Refer to the AT17F Programming
Specification available on the Atmel web site (www.atmel.com) for additional details.
Notes:
Paging Decodes
PAGESEL = 00, PAGE_EN = 1
PAGESEL = 01, PAGE_EN = 1
PAGESEL = 10, PAGE_EN = 1
PAGESEL = 11, PAGE_EN = 1
PAGESEL = XX, PAGE_EN = 0
1. This pin has an internal 20 K pull-up resistor.
2. This pin has an internal 30 K pull-down resistor.
Address Space
CC
AT17F32 (32 Mbits)
000000 – 07FFFFh
080000 – 0FFFFFh
100000 – 17FFFFh
180000 – 1FFFFFh
000000 – 1FFFFFh
and GND is recommended.
Table 5-2 on page
Table
AT17F32
5-2. When
5. In a
5

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