HEF4543BP,652 NXP Semiconductors, HEF4543BP,652 Datasheet - Page 8

• Manufacturer Part Number: HEF4543BP,652
• Description: IC BCD-7 SEG DECODER/DRVR 16-DIP
• Manufacturer: NXP Semiconductors

Specifications of HEF4543BP,652

• Package / Case: 16-DIP (0.300", 7.62mm)
• Display Type: LED, LCD
• Configuration: 7 Segment
• Interface: BCD
• Voltage - Supply: 3 V ~ 15 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Product: Latch/Decoder/Driver
• Logic Family: HE4000B
• Number Of Lines (input / Output): 7.0 / 7.0
• Propagation Delay Time: 150 ns
• Supply Voltage (max): 15 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Number Of Input Lines: 7.0
• Number Of Output Lines: 7.0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-3138-5; 933334320652; HEF4543BPN

NXP Semiconductors
Table 7.
V
[1]
Table 8.
P
12. Waveforms
HEF4543B_5
Product data sheet
Symbol
t
t
Symbol
P
h
W
SS
D
Fig 5.
D
can be calculated from the formulas shown. V
= 0 V; T
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
Qg
D2
LE
LT
BL
V
V
V
V
V
V
OH
SS
SS
SS
SS
OL
Conditions: D3 = LOW and D0 = D1 =HIGH.
Propagation delays and output transitions times
V
V
V
V
Parameter
hold time
pulse width
I
I
I
I
Dynamic characteristics
Dynamic power dissipation P
Parameter
dynamic power
dissipation
amb
t
THL
90 %
= 25 C; For test circuit see
V
M
V
10 %
M
t
PHL
t
PLH
t
TLH
V
10 V
15 V
5 V
DD
Conditions
D
see
pin LE HIGH;
minimum width;
see
n
to LE;
Figure 6
Figure 6
…continued
V
M
Typical formula for P
P
P
P
D
Figure
D
D
D
t
PHL
= 2200
= 10400
= 33000
SS
Rev. 05 — 27 October 2009
7;unless otherwise specified.
= 0 V; t
V
10 V
15 V
10 V
15 V
5 V
5 V
DD
f
i
f
f
+ (f
i
i
+ (f
+ (f
r
= t
o
f
Extrapolation formula
o
o
V
D
C
M
20 ns; T
C
C
( W)
L
)
L
L
)
)
V
t
V
V
PLH
DD
amb
DD
DD
2
2
2
V
BCD to 7-segment latch/decoder/driver
= 25 C.
M
t
PHL
where:
f
f
C
V
i
o
[1]
(C
DD
= input frequency in MHz,
L
= output frequency in MHz,
= output load capacitance in pF,
L
= supply voltage in V,
t
PLH
f
Min
15
20
60
30
20
o
) = sum of the outputs.
0
HEF4543B
Typ
15
30
15
10
0
5
© NXP B.V. 2009. All rights reserved.
Max
-
-
-
-
-
-
t
PLH
L
in pF).
001aaj496
Unit
ns
ns
ns
ns
ns
ns
8 of 16
t
PHL