IRS2552DPBF International Rectifier, IRS2552DPBF Datasheet - Page 20

• Manufacturer Part Number: IRS2552DPBF
• Description: IC CTLR BALLAST CCFL/EEFL 16-DIP
• Manufacturer: International Rectifier
• Type: CCFL/EEFL Controllerr

Specifications of IRS2552DPBF

• Frequency: 39 ~ 69 kHz
• Current - Supply: 10mA
• Current - Output: 450mA
• Voltage - Supply: 10.6 V ~ 15.6 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Module Configuration: Half Bridge
• Supply Current: 10mA
• Supply Voltage Range: 9.6V To 16.6V
• Driver Case Style: DIP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +125°C
• Base Number: 25
• Rohs Compliant: Yes
• Svhc: No SVHC
• Package: 16-pin DIP
• Circuit: Half-Bridge Driver
• Offset Voltage (v): 600
• Output Source Current Min (ma): 300
• Output Sink Current Min (ma): 450
• Pbf: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IRS2552D
PCB Layout Tips
Distance between high and low voltage components: It’s strongly recommended to place the components tied to the
floating voltage pins (V
and V
) near the respective high voltage portions of the device.
B
S
Ground Plane: In order to minimize noise coupling, the ground plane should not be placed under or near the high
voltage floating side.
Gate Drive Loops: Current loops behave like antennas and are able to receive and transmit EM noise (see Figure 5).
In order to reduce the EM coupling and improve the power switch turn on/off performance, the gate drive loops must
be reduced as much as possible. Moreover, current can be injected inside the gate drive loop via the IGBT collector-
to-gate parasitic capacitance. The parasitic auto-inductance of the gate loop contributes to developing a voltage
across the gate-emitter, thus increasing the possibility of a self turn-on effect.
Figure 5: Antenna Loops
Supply Capacitor: It is recommended to place a bypass capacitor (C
) between the V
and V
pins. A ceramic
IN
CC
SS
1 μF ceramic capacitor is suitable for most applications. This component should be placed as close as possible to
the pins in order to reduce parasitic elements.
Routing and Placement: Power stage PCB parasitic elements can contribute to large negative voltage transients as
the switch node; it is recommended to limit the phase voltage negative transients. In order to avoid such conditions,
it is recommended to 1) minimize the high-side emitter to low-side collector distance, and 2) minimize the low-side
emitter to negative bus rail stray inductance. However, where negative V
spikes remain excessive, further steps
S
may be taken to reduce the spike. This includes placing a resistor (5 Ω or less) between the V
pin and the switch
S
node (see Figure 6), and in some cases using a clamping diode between V
and V
(see Figure 7). See DT04-4 at
SS
S
www.irf.com
for more detailed information.
www.irf.com
© 2009 International Rectifier
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