IRS2166DPBF International Rectifier, IRS2166DPBF Datasheet

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... Micropower startup (250 µA) Latch immunity and ESD protection System Features Improved V regulation voltage tolerance BUS Increased SD pin shutdown voltage threshold hysteresis Changed EOL pin internal 2.0 V bias to a +/-10 µA OTA Internal bootstrap MOSFET Packages 16-Lead PDIP IRS2166DPbF IRS2166DSPbF CC 16-Lead SOIC Page 1 ...

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Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ...

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Electrical Characteristics =14 V +/- 0. BIAS 1000 pF 470 pF, T =25 °C unless otherwise specified. See state diagram for MODE Symbol Supply Characteristics V supply ...

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Electrical Characteristics (cont’ =14 V +/- 0. BIAS 1000 pF 470 pF, T =25 °C unless otherwise specified. See state diagram for MODE Symbol PFC Protection Circuitry ...

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Schematic Block Diagram Please Note: All values shown in block diagram are typical values only www.irf.com IRS2166D(S)PbF Page 5 ...

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State Diagram SD/EOL > 5.0 V (VSDTH+) (Lamp Removal) or VCC < 10.5 V (VCCUV-) (Power Turned Off) FAULT Mode Fault Latch Set 1 / -Bridge Off 2 ≅ 600μA I QCCFLT CPH = ...

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Lead Assignments & Definitions VBUS 1 CPH RPH COMP PFC 8 www.irf.com HO Pin # Symbol 16 1 VBUS DC bus sensing input CPH Preheat timing capacitor ...

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Timing Diagrams Ballast Section VCC 15.6V UVLO+ UVLO- VCC CPH f FREQ 1.25V UVLO PH RT RPH www.irf.com PH 50 events of CS>1.25V OPEN RT RPH OPEN RPH ...

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I. Ballast Section Functional Description Undervoltage Lock-Out Mode (UVLO) The undervoltage lock-out mode (UVLO) is defined as the state the when the IC. To identify the different modes of the IC, refer to the ...

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V (+) BUS OSC RPH 5uA CPH 2 C CPH V (-) BUS Fig. 3: Preheat circuitry gate of a p-channel MOSFET (S4) (see Fig. 4) ...

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V is above V + (ballast power on) and SD is pulled CC CCUV above 5 and back below 3 SDTH+ re-insertion), the IC will enter preheat mode and begin oscillating again. The current sense ...

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The PFC control circuit of the IRS2166D (Fig. 8) only requires four control pins: VBUS, COMP, ZX and PFC. The VBUS pin is for sensing the DC bus voltage (via an external resistor voltage divider), the COMP pin programs the ...

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I LPFC 0 PFC pin 0 near peak region of rectified AC line Fig. 12: On-time modulation near the zero-crossings decrease below the internal 4.0 V threshold (V watch-dog pulse is forced on the PFC pin and normal PFC operation ...

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DPFC LPFC Rect (+) CBUS MPFC RD DOC 47 1N4148 RS 1 Rect (-) Fig. 14: External over-current protection circuit Should high currents occur, the voltage across the current- sensing resistor will exceed 4.3V over-voltage protection threshold at the VBUS ...

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PH ⎛ ⋅ ⎜ ⎜ ⋅ ⋅ ⎝ ⎛ 1 ⎜ ⎜ ⋅ ⋅ ⎝ ...

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CaseOutlines www.irf.com IRS2166D(S)PbF Page 16 ...

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Tape & Reel F NOTE : CONTROLLING DIM ENSION CARRIER TAPE DIMENSION FOR 16SOICN Code REEL DIMENSIONS FOR 16SOICN Code ...

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... SOIC Tape & Reel IRS2166DSTRPbF www.irf.com ORDER INFORMATION 16-Lead PDIP IRS2166DPbF 16-Lead SOIC IRS2166DSPbF This product has been designed and qualified for the industrial level. Qualification standards can be found at IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 Data and specifications subject to change without notice ...