DS3992Z-18P+T&R Maxim Integrated Products, DS3992Z-18P+T&R Datasheet - Page 7

IC CCFL CNTRLR 2CH 16-SOIC

DS3992Z-18P+T&R

Manufacturer Part Number
DS3992Z-18P+T&R
Description
IC CCFL CNTRLR 2CH 16-SOIC
Manufacturer
Maxim Integrated Products
Type
CCFL Controllerr
Datasheet

Specifications of DS3992Z-18P+T&R

Frequency
40 ~ 80 kHz
Current - Supply
8mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Lead Free Status / Rohs Status
 Details
Each DS3992 channel drives two logic-level n-channel
MOSFETs that are connected between the ends of
a step-up transformer and ground (See the Typical
Operating Circuits ). The transformer has a center tap
on the primary side that is connected to the DC inverter
voltage supply. The DS3992 alternately turns on the two
MOSFETs to create the high-voltage AC waveform on
the secondary side. By varying the duration of the
MOSFET turn-on times, the DS3992 is able to accurate-
ly control the CCFL current.
A resistor in series with the CCFL’s ground connection
enables current monitoring. The voltage across this
resistor is fed to the lamp current monitor (LCM) input
and compared to an internal reference voltage to deter-
mine the duty cycle for the MOSFET gates.
The DS3992 supports a 1 lamp per channel configura-
tion with fully independent lamp control and minimal
Figure 2. DS3992 Per Channel Logic Diagram
Figure 3. Digital-PWM Dimming and Soft-Start
LAMP CURRENT
DPWM SIGNAL
[20.48MHz TO 40.96MHz]
512 x LAMP FREQUENCY
DIMMING PWM SIGNAL
LAMP FREQUENCY
[40kHz TO 80kHz]
CHANNEL ENABLE
CHANNEL FAULT
Two-Channel, Push-Pull CCFL Controller
Detailed Description
180Hz TO 440Hz
90Hz TO 220Hz
OR
CONTROLLER
DIGITAL
_____________________________________________________________________
CCFL
LAMP MAXIMUM VOLTAGE REGULATION
64 LAMP CYCLE
INTEGRATOR
LAMP STRIKE AND REGULATION
LAMP OVERCURRENT
OVERVOLTAGE
external components. The DS3992 is also capable of
controlling more than 1 lamp per channel using a
wired-OR feedback circuit. See the Typical Operating
Circuits section for more information.
Block diagrams of the DS3992 are shown in Figures 1
and 2. More operating details of the DS3992 are dis-
cussed on the following pages of this data sheet.
The DS3992 uses “burst” dimming to control the lamp
brightness. An analog voltage applied at the BRIGHT
input pin determines the duty cycle of a digital pulse-
width-modulated (DPWM) signal (90Hz to 220Hz for
DS3992Z-09P/DS3992Z-09N and 180Hz to 440Hz for
DS3992Z-18P/DS3992Z-18N). During the high period of
the DPWM cycle, the lamp is driven at the selected
lamp frequency (40kHz to 80kHz) as shown in Figure 3.
This part of the cycle is also called the “burst” period
because of the lamp frequency burst that occurs
Functional Diagrams (continued)
LAMP OUT
DRIVERS
GATE
400mV
1.0V
1.0V
2.0V
GAn
GBn
LCMn
LAMP CURRENT MONITOR
OVDn
OVERVOLTAGE DETECTOR
MOSFET
DRIVERS
GATE
Dimming Control
7

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