ISL6207CB Intersil, ISL6207CB Datasheet - Page 5

• Manufacturer Part Number: ISL6207CB
• Description: IC MOSFET DRVR SYNC BUCK 8-SOIC
• Manufacturer: Intersil

Specifications of ISL6207CB

• Configuration: High and Low Side, Synchronous
• Input Type: PWM
• Delay Time: 20ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 36V
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -10°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Electrical Specifications
NOTE:
Functional Pin Description
UGATE (Pin 1 for SOIC-8, Pin 8 for QFN)
The UGATE pin is the upper gate drive output. Connect to
the gate of high-side power N-Channel MOSFET.
BOOT (Pin 2 for SOIC-8, Pin 1 for QFN)
BOOT is the floating bootstrap supply pin for the upper gate
drive. Connect the bootstrap capacitor between this pin and
the PHASE pin. The bootstrap capacitor provides the charge
to turn on the upper MOSFET. See the Bootstrap Diode and
Capacitor section under DESCRIPTION for guidance in
choosing the appropriate capacitor value.
PWM (Pin 3 for SOIC-8, Pin 2 for QFN)
The PWM signal is the control input for the driver. The PWM
signal can enter three distinct states during operation, see the
three-state PWM Input section under DESCRIPTION for further
details. Connect this pin to the PWM output of the controller. In
addition, place a 500kΩ resistor to ground from this pin. This
allows for proper three-state operation under all start-up
conditions.
GND (Pin 4 for SOIC-8, Pin 3 for QFN)
GND is the ground pin. All signals are referenced to this node.
LGATE (Pin 5 for SOIC-8, Pin 4 for QFN)
LGATE is the lower gate drive output. Connect to gate of the
low-side power N-Channel MOSFET.
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
OUTPUT
Upper Drive Source Resistance
Upper Driver Source Current (Note 5)
Upper Drive Sink Resistance
Upper Driver Sink Current (Note 5)
Lower Drive Source Resistance
Lower Driver Source Current (Note 5)
Lower Drive Sink Resistance
Lower Driver Sink Current (Note 5)
5. Guaranteed by characterization, not 100% tested in production.
PARAMETER
5
Recommended Operating Conditions, Unless Otherwise Noted. (Continued)
t
t
PDHUGATE
PDHLGATE
SYMBOL
R
R
R
R
I
I
I
I
UGATE
UGATE
LGATE
LGATE
UGATE
UGATE
LGATE
LGATE
V
V
500mA Source Current
-10°C to 85°C
V
500mA Sink Current
-10°C to 85°C
V
500mA Source Current
-10°C to 85°C
V
500mA Sink Current
-10°C to 85°C
V
VCC
VCC
UGATE-PHASE
UGATE-PHASE
LGATE
LGATE
ISL6207
= 5V, Outputs Unloaded
= 5V, Outputs Unloaded
= 2.5V
= 2.5V
TEST CONDITIONS
VCC (Pin 6 for SOIC-8, Pin 5 for QFN)
Connect the VCC pin to a +5V bias supply. Place a high
quality bypass capacitor from this pin to GND.
EN (Pin 7 for SOIC-8, Pin 6 for QFN)
EN is the enable input pin. Connect this pin to HIGH to
enable, and LOW to disable, the IC. When disabled, the IC
draws less than 1µA bias current.
PHASE (Pin 8 for SOIC-8, Pin 7 for QFN)
Connect the PHASE pin to the source of the upper MOSFET
and the drain of the lower MOSFET. This pin provides a
return path for the upper gate driver.
Description
Operation
Designed for speed, the ISL6207 dual MOSFET driver
controls both high-side and low-side N-Channel FETs from
one externally provided PWM signal.
A rising edge on PWM initiates the turn-off of the lower
MOSFET (see Timing Diagram). After a short propagation
delay [t
times [t
section. Adaptive shoot-through circuitry monitors the LGATE
voltage and determines the upper gate delay time
[t
below 1V. This prevents both the lower and upper MOSFETs
from conducting simultaneously, or shoot-through. Once this
delay period is completed, the upper gate drive begins to rise
[t
= 2.5V
= 2.5V
PDHUGATE
RUGATE
PDLLGATE
FLGATE
], and the upper MOSFET turns on.
], based on how quickly the LGATE voltage drops
] are provided in the Electrical Specifications
], the lower gate begins to fall. Typical fall
MIN
10
10
-
-
-
-
-
-
-
-
-
-
-
-
TYP
1.0
1.0
2.0
1.0
1.0
2.0
1.0
1.0
2.0
0.4
0.4
4.0
20
20
MAX
2.5
2.2
2.5
2.2
2.5
2.2
1.0
0.8
30
30
-
-
-
-
December 2, 2005
UNITS
FN9075.8
ns
ns
Ω
Ω
A
Ω
Ω
A
Ω
Ω
A
Ω
Ω
A