ISL6144IVZA Intersil, ISL6144IVZA Datasheet - Page 10

IC CTRLR MOSFET ORING HV 16TSSOP

ISL6144IVZA

Manufacturer Part Number
ISL6144IVZA
Description
IC CTRLR MOSFET ORING HV 16TSSOP
Manufacturer
Intersil
Datasheet

Specifications of ISL6144IVZA

Applications
Telecom/Datacom Systems
Fet Type
N-Channel
Number Of Outputs
1
Internal Switch(s)
No
Delay Time - On
1ms
Delay Time - Off
250ns
Voltage - Supply
10 V ~ 75 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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The duration of the reverse current pulse is a few hundred
nanoseconds and is normally kept well below current rating
of the ORing MOSFET.
Reducing the value of V
current amplitude and reduces transients on the common
bus output voltage.
HVREF and COMP Capacitor Values
HVREF CAPACITOR (C1)
this capacitor is necessary to stabilize the HV
and a value of 150nF is sufficient. Increasing this value will
result in gate turn-on time increase.
COMP CAPACITOR (C2)
Placed between V
and decoupling. A 10nF capacitor is adequate for most
cases.
Typical Performance Curves and Waveforms
FIGURE 4. CHARGE PUMP VOLTAGE (V
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
12
11
10
FIGURE 6. I BIAS CURRENT vs TEMPERATURE
9
8
7
-40
-40
TEMPERATURE
-20
-20
OUT
0
0
and COMP pins to provide filtering
TH(HS)
TEMPERATURE (°C)
TEMPERATURE (°C)
20
20
10
results in lower reverse
40
40
60
60
GQP
80
80
REF(VZ)
) vs
75V
10V
12V
100
100
12V
75V
12V
10V
48V
48V
supply
120
120
ISL6144
Protecting VIN and VOUT from High dv/dt Events
In hot swap applications where the ISL6144 is directly
connected to a prebiased bus (thus exposing either the VIN
or VOUT pins directly to high dv/dt transients), these pins
must be filtered to prevent catastrophic damage caused by
the high dv/dt transients. A simple RC filter using a series
resistor, < 100Ω and the standard > 100nF decoupling
capacitor to ground. This will give >1µs rise time on the VIN
pin to protect it. A resistor of the same value may be added
to the other (VOUT) pin to eliminate the small HS Vth error
introduced by that series R, ~0.45V at 48V with 100Ω
resistor. Alternately the programmed HS Vth can be adjusted
upward by that much as previously described.
.
5.4
5.3
5.2
5.1
5.0
32
28
24
20
16
12
FIGURE 5. REG. AMP FORWARD REGULATION
-40
-40
-20
-20
FIGURE 7. VSET VOLTAGE
0
0
TEMPERATURE (°C)
TEMPERATURE (°C)
20
20
40
40
60
60
10V AND 12V
80
10V AND 12V
80
100
100
January 6, 2011
48V
75V
75V
48V
FN9131.6
120
120

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