MAX8664BEEP+ Maxim Integrated Products, MAX8664BEEP+ Datasheet - Page 23

IC CNTRLR DUAL OUT 20-QSOP

MAX8664BEEP+

Manufacturer Part Number
MAX8664BEEP+
Description
IC CNTRLR DUAL OUT 20-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8664BEEP+

Applications
Power Supplies
Current - Supply
1.4mA
Voltage - Supply
4.5 V ~ 28 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The high-side MOSFET(s) operate as duty-cycle control
switches and have the following major losses: the chan-
nel conduction loss (P
loss (P
mum power dissipation could occur either at V
or V
Use R
where I
capability determined by:
where R
(see the Electrical Characteristics ) and R
internal gate resistance of the MOSFET (~ 2Ω):
where V
The high-side MOSFET(s) do not have body diode con-
duction loss, unless the converter is sinking current.
When sinking current, calculate this loss as
P
where t
Allow an additional 20% for losses due to MOSFET out-
put capacitances and low-side MOSFET body diode
reverse-recovery charge dissipated in the high-side
MOSFET(s). Refer to the MOSFET data sheet for ther-
mal resistance specifications to calculate the PCB area
needed to maintain the desired maximum operating
junction temperature with the above calculated power
dissipations.
Fast switching transitions cause ringing because of res-
onating circuit parasitic inductance and capacitance at
the switching nodes. This high-frequency ringing
occurs at LX’s rising and falling transitions and can
HSDC(MAX)
P
IN(MIN)
P
HSSW MAX
P
HSCC MAX
DS(ON)
HSDR
HSSW
WD
GATE
GS
DS(ON)(DR)
(
:
(
is about 130ns.
≈ V
=
), and the drive loss (P
= I
I
at T
GATE
Q
is the average DH driver output-current
VL
)
G
)
LOAD(MAX)
=
.
=
J(MAX)
×
Controller with Fast Transient Response
V
______________________________________________________________________________________
V
V
IN MAX
V
GS
IN MIN
is the DH_ driver’s on-resistance
R
(
OUT
HSCC
(
DS ON DR
:
×
MOSFET Snubber Circuit
(
f
S
)
)
×
0 5 .
×
x V
), the overlapping switching
×
I
)(
LOAD MAX
R
I
2
LOAD MAX
×
GATE
F
Low-Cost, Dual-Output, Step-Down
V
)
x (2 x t
VL
+
(
R
(
R
+
GATE
HSDR
GATE
R
)
DS ON DR
DT
)
×
×
(
I
Q
GATE
). The maxi-
R
+ t
GATE
GD
DS ON
)(
WD
(
IN(MAX)
×
)
) x f
is the
f
)
S
S
,
interfere with circuit performance and generate EMI. To
dampen this ringing, a series RC snubber circuit is
added across each low-side switch. Below is the pro-
cedure for selecting the value of the series RC circuit.
Connect a scope probe to measure V
observe the ringing frequency, f
Find the capacitor value (connected from LX_ to GND)
that reduces the ringing frequency by half.
The circuit parasitic capacitance (C
equal to 1/3 the value of the added capacitance above.
The circuit parasitic inductance (L
The resistor for critical dampening (R
2π x f
tailor the desired damping and the peak-voltage excur-
sion.
The capacitor (C
the value of the C
the snubber circuit is dissipated in the resistor
(P
where V
frequency. Choose an R
the specific application’s derating rule for the power
dissipation calculated.
Connect a resistor from ILIM_ to the drain of the high-
side MOSFET(s) to set the overcurrent protection
threshold. ILIM_ sinks 50µA (typ) through this resistor.
When the drain-source voltage exceeds the voltage
drop across this resistor during the high-side MOS-
FET(s) on-time, overcurrent protection is triggered. To
set the output current level where overcurrent protec-
tion is triggered (I
resistor as follows:
where R
high-side MOSFET(s) at +25°C. At higher tempera-
tures, the ILIM current increases to compensate for the
temperature coefficient of the high-side MOSFET(s).
RSNUB
R
x L
IN
DS(ON)HS
) and can be calculated as:
is the input voltage and f
PAR
Setting the Overcurrent Threshold
P
R
RSNUB
. Adjust the resistor value up or down to
ILIM
L
SNUB
PAR
LIMIT
PAR
is the maximum on-resistance of the
_
=
=
=
to be effective. The power loss of
) should be at least 2 to 4 times
), calculate the value of the ILIM_
C
R
(
DS ON HS
SNUB
2
SNUB
π
(
f
R
)
50μ
2
×
)
1
power rating that meets
×
R
( )
V
.
C
A
IN
PAR
×
PAR
I
LIMIT
SW
PAR
2
) is calculated by:
SNUB
×
LX_
f
is the switching
) at LX_ is then
SW
to GND and
) is equal to
23

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