HIP6501ACB Intersil, HIP6501ACB Datasheet

HIP6501ACB

Manufacturer Part Number

HIP6501ACB

Description

IC PWM TRIPLE POWER CTRLR 16SOIC

Manufacturer

Intersil

Datasheet

1.HIP6501ACBZ.pdf (14 pages)

Specifications of HIP6501ACB

Applications

Power Supply Controller

Voltage - Supply

5V, 12V

Current - Supply

20mA

Operating Temperature

0°C ~ 70°C

Mounting Type

Surface Mount

Package / Case

16-SOIC (3.9mm Width)

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Voltage - Input

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Triple Linear Power Controller with ACPI

Control Interface

The HIP6501A, paired with either the HIP6020 or HIP6021,

simplifies the implementation of ACPI-compliant designs in

microprocessor and computer applications. The IC

integrates two linear controllers and a low-current pass

transistor, as well as the monitoring and control functions

into a 16-pin SOIC package. One linear controller generates

the 3.3V

5VSB output during sleep states (S3, S4/S5), powering the

PCI slots through an external pass transistor, as instructed

by the status of the 3.3V

transistor is used to switch in the ATX 3.3V output for PCI

operation during S0 and S1 (active) operatingstates. The

second linear controller supplies the computer system’s

2.5V/3.3V memory power through an external pass

transistor in active states. During S3 state, an integrated

pass transistor supplies the 2.5V/3.3V sleep-state power. A

third controller powers up a 5V

the ATX 5V output in active states, or the ATX 5VSB in sleep

states.

The HIP6501A’s operating mode (active-state outputs or

sleep-state outputs) is selectable through two control pins:

S3 and S5. Further control of the logic governing activation

of different power modes is offered through two enabling

pins: EN3VDL and EN5VDL. In active states, the 3.3V

linear regulator uses an external N-Channel pass MOSFET

to connect the output (V

supplied by an ATX (or equivalent) power supply, while

incurring minimal losses. In sleep state, the 3.3V

is supplied from the ATX 5VSB through an NPN transistor,

also external to the controller. Active state power delivery for

the 2.5/3.3V

transistor, or an NMOS switch for the 3.3V setting. In sleep

states, conduction on this output is transferred to an internal

pass transistor. The 5V

external MOS transistors. In sleep states, a PMOS (or PNP)

transistor conducts the current from the ATX 5VSB output,

while in active states, current flow is transferred to an NMOS

transistor connected to the ATX 5V output. Similar to the

3.3V

dictated not only by the status of the S3 and S5 pins, but that

of the EN5VDL pin as well.

DUAL

output, the operation of the 5V

MEM

voltage plane from an ATX power supply’s

output is done through an external NPN

DUAL

OUT1

output is powered through two

) directly to the 3.3V input

enable pin. An additional pass

DUAL

Data Sheet

plane by switching in

DUAL

output is

DUAL

output

DUAL

1-888-INTERSIL or 321-724-7143

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Provides 3 ACPI-Controlled Voltages

• Simple Control Design - No Compensation Required

• Excellent Output Voltage Regulation

• Fixed Output Voltages Require No Precision External

• Small Size

• Selectable 2.5V

• Under-Voltage Monitoring of All Outputs with Centralized

• Adjustable Soft-Start Function Eliminates 5VSB

• Pb-Free Available (RoHS Compliant)

Pinout

Ordering Information

HIP6501ACB

HIP6501ACBZ

(Note)

HIP6501AEVAL1

*Add “-T” suffix to part number for tape and reel packaging.

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding

compounds/die attach materials and 100% matte tin plate termination finish, which

are RoHS compliant and compatible with both SnPb and Pb-free soldering

operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-

020.

PART NUMBER

December 30, 2004

- 5V Active/Sleep (5V

- 3.3V Active/Sleep (3.3V

- 2.5V/3.3V Active/Sleep (2.5V

- 3.3V

- 2.5V/3.3V Output: ±2.0% Over Temperature; Both

Resistors

- Small External Component Count

- 2.5V for RDRAM Memory

- 3.3V for SDRAM Memory

FAULT Reporting

Perturbations

States Only

Operational States (3.3V setting in sleep only)

All other trademarks mentioned are the property of their respective owners.

DUAL

3V3DLSB

EN3VDL

EN5VDL

Intersil (and design) is a registered trademark of Intersil Americas Inc.

3V3DL

5VSB

GND

Output: ±2.0% Over Temperature; Sleep

MEM

Evaluation Board

RANGE (°C)

HIP6501A (SOIC)

0 to 70

TEMP.

Output Voltage Via FAULT/MSEL Pin

DUAL

TOP VIEW

DUAL

)

16 Ld SOIC

(Pb-free)

MEM

)

PACKAGE

)

VSEN2

12V

5VDL

5VDLSB

DLA

FAULT/MSEL

DRV2

HIP6501A

FN4749.6

M16.15

DWG. #

PKG.

Related parts for HIP6501ACB

HIP6501ACB Summary of contents

Page 1

... Ordering Information output is DUAL PART NUMBER HIP6501ACB HIP6501ACBZ (Note) HIP6501AEVAL1 *Add “-T” suffix to part number for tape and reel packaging. NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 2

Block Diagram 12V 3V3DLSB 12V BIAS 12V MONITOR 10.8V/9.0V FAULT/MSEL UV DETECTOR + - MEM VOLTAGE + 40µA SELECT COMP 0. COMPARATOR - 5VDL + + 3.75V 10µA - 3V3DL 5VSB EA4 - + 5VSB POR 4.5V/4.0V MONITOR ...

Page 3

Simplified Power System Diagram +5V IN +12V IN +5V SB +3. 3.3V DUAL FAULT SHUTDOWN S3 S5 EN5VDL EN3VDL Typical Application +5V IN +12V IN +5V SB +3. OUT1 3.3V DUAL FAULT SLP_S3 SLP_S5 ...

Page 4

Absolute Maximum Ratings Supply Voltage +7.0V 5VSB 12V. . ...

Page 5

Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued) PARAMETER 5VDUAL SWITCH CONTROLLER (V OUT3 5VDL Under-Voltage Rising Threshold 5VDL Under-Voltage Hysteresis 5VDLSB Output Drive Current 5VDLSB Pull-up Impedance to 5VSB TIMING INTERVALS ...

Page 6

FAULT pin low. The C capacitor is also used to SS provide a controlled voltage slew rate during active-to-sleep transitions on the 3.3V and 2.5/3.3V DUAL 12V (Pin 14) Connect this pin to the ATX (or equivalent) 12V ...

Page 7

TABLE 2. 5V OUTPUT (V DUAL OUT3 EN5VDL S5 S3 5VDL S0, S1 STATES (Active Note 5 Maintains Previous State S4/ ...

Page 8

S3 S5 12V 3V3DLSB DLA 3V3DL 5VDLSB 5VDL FIGURE 6. 3V AND 5V TIMING DIAGRAM FOR DUAL DUAL EN3VDL = 0, EN5VDL = 1 5VSB S3 S5 12V 3V3DLSB DLA 3V3DL 5VDLSB 5VDL FIGURE 7. 3V AND 5V TIMING ...

Page 9

Soft-Start into Active States (S0, S1) If both S3 and S5 are logic high at the time the 5VSB is applied, the HIP6501A will assume an active state and keep off the controlled external transistors until about 50ms after the ...

Page 10

FAULT/MSEL MEM VOLTAGE R SEL SELECT COMP 40µ SEL MEM 1kΩ 2.5V 10kΩ 3.3V FIGURE 11. 2.5/3.3V OUTPUT VOLTAGE SELECTION MEM CIRCUITRY DETAILS Application Guidelines Soft-Start Interval The 5VSB output of a typical ATX supply is capable of ...

Page 11

The only critical small signal component is the soft-start capacitor ...

Page 12

P-Channel MOSFET is used to switch the 5VSB output of the ATX supply into the 5V output during S3 and DUAL S4/S5 states (as dictated by EN5VDL status), then, similar to the situation where ...

Page 13

... HUF76113SK8. Q4 can also be a PNP, such as an MMBT2907AL. For detailed information on the circuit, including a Bill-of-Materials and circuit board description, see DUAL Application Note AN9846. memory voltage ) from +3.3V, +5V, See Intersil’s web site www.intersil.com for the latest information 10µF C4 1µF ...

Page 14

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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